silicon

https://www.theregister.co.uk/2019/08/29/carbon_nanotube_chip/ Maybe a solution to the limiting returns of Silicon die shrinks is in sight?

TSMC is showing off their new Wafer-on-Wafer (WoW) chip stacking technology and it might be a boon for multichip solutions in the future. The technology allows two dies to sit on top of each other and this allows interconnects to be very short and minimizes transfer times between them. Imagine...

We all know that CPU engineers have a grinding job and are likely under a tremendous amount of stress. There has to be a better way to blow of steam than killing hookers and hiding them in your trunk, right? The Smithsonian (yeah, those guys) have a small collection of silicon artwork that is...

IBM and its Research Alliance partners GLOBALFOUNDRIES and Samsung have developed a first-of-a-kind process to build silicon nanosheet transistors that will enable 5 nanometer chips. The resulting increase in performance will help accelerate cognitive computing, the Internet of Things (IoT) and...

I came across a very interesting article over The Register that attempts to digest and summarize this document recently released by Google. Revealed last Friday, the document outlines six layers of security and reveals some interesting factoids about the Alphabet subsidiary's operations, none...