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Zen 7 Rumours / AMD "Zen 6" ISA to Bring AVX512 FP16, VNNI INT8, and More

erek

erek

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"A set of GNU compiler patches confirms this, as the new open-source enablement adds AVX512_BMM, AVX_NE_CONVERT, AVX_IFMA, AVX_VNNI_INT8, and AVX512_FP16 to GCC. These instructions are particularly interesting due to their intended use cases. AVX-512 BMM is designed for bit matrix manipulation, significantly accelerating local AI deployments. With native FP16 calculations and AVX VNNI in INT8 format on desktops, users will no longer need to rely on Intel Xeon CPUs for AVX-related development and process acceleration. This development benefits more users across the entire product family based on Zen 6. AMD is now directly competing with Intel in AVX development, meaning the difference between the two will come down to implementation strategy. There is also increasing evidence that Intel's next-generation "Nova Lake" will reintroduce AVX-512 functionality to desktops, suggesting that advanced vector and matrix acceleration is set to expand on consumer PCs."

Source: https://www.techpowerup.com/342763/amd-zen-6-isa-to-bring-avx512-fp16-vnni-int8-and-more
 
Mega6 said:
Just AI stuff. The only real benefit for gamers is the die shrink and maybe the 16 core cpu CCX down the road.
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Will also have to see if there is a limit on dimisning return but that would also mean quite the large L2/L3 cache per CCX (50% increase like the max core count as a minimum I would expect), TSMC 2N could mean significantly higher clocks as well and new memory control to support/gain from fast DDR5 this time around
 
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LukeTbk said:
Will also have to see if there is a limit on dimisning result but that would also mean quite the large L2/L3 cache per CCX,
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Agreed, the cache will increase for Zen6.

LukeTbk said:
TSMC 2N could mean significantly higher clocks as well and new memory control to support/gain from fast DDR5 this time around
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Of course higher clocks, that's implied with any die shrink.
 

“AMD Zen 7 to Implement AVX10 and ACE Instruction Sets​

by btarunr Yesterday, 18:34 Discuss (21 Comments)
AMD on Tuesday unveiled its future "Zen 7" CPU microarchitecture. The company has been pivoting toward making its CPU IP more AI-relevant, so future processing workloads could better leverage the serial processing power of CPUs. Among these, the two important ones are AVX10 and ACE. AVX10 sees a unification of AVX-512 and AVX2 features to improve performance and compatibility across vector math heavy workloads. ACE, or Advanced Matrix Extensions for Matrix Manipulation, is an industry-standard matrix math instruction set that could prove to be relevant to every device ranging from smartphones to servers.

Among the other ISA additions with Zen 7 are FRED (flexible return and event delivery), which replaces the current device interrupt model to reduce system-level latency. Zen 7 also implements ChkTag x86 Memory Tagging to counteract several kinds of memory-level data vulnerabilities caused by buffer overflows and use-after-free errors. FRED in particular was a noteworthy feature Intel was working on for its x86S machine architecture standard.“
 

“AMD Confirms Zen 6 (2 nm) and Zen 7 with Efficiency Upgrades and New AI Features​

by Nomad76 Yesterday, 12:32 Discuss (68 Comments)
AMD has updated its CPU core roadmap confirming Zen 6 and Zen 7 architectures as the next steps for its Ryzen and EPYC product families. The new roadmap was shown during the company's Financial Analyst Day 2025. Zen 6 will launch next year and is built using TSMC's 2 nm process node. The lineup will include both Zen 6 and Zen 6C variants, optimized respectively for high performance and power efficiency. According to AMD CTO Mark Papermaster, Zen 6 will bring higher IPC, improved efficiency and expanded AI data type support with additional AI pipelines. We recently detailed here the first Zen 6 ISA changes, which introduce several new instruction sets and expanded compute capabilities. The architecture will appear across multiple platforms, including EPYC "Venice," Ryzen Desktop "Olympic Ridge," and Ryzen Mobile "Medusa Point."

For the first time, AMD has also confirmed Zen 7, listed on the roadmap as a "Future Node" and "Next-Generation" design. Zen 7 will introduce a new matrix engine and broaden AI data format handling, marking a shift toward deeper AI integration within standard CPU cores. AMD has not disclosed the specific process node or launch window, though the architecture is expected to follow Zen 6 around 2027 in next-generation EPYC "Verano" processors. No other details about Zen 7 were shared, so we have to wait for specific things like cache layout, core counts, and power targets.“
 
AMD should release Zen6 soon because Apple already beat them to the punch and their M5 chips are making Ryzen look dated.
 
Mega6 said:
Just AI stuff. The only real benefit for gamers is the die shrink and maybe the 16 core cpu CCX down the road.
Click to expand...
I would be curious with all of the AI added stuff, for gamers, games that will utilize AI in some form, such as Arc Raiders and voices I was just reading, could they off load some work to said AI instructions locally to improve performance..
 
MrGuvernment said:
I would be curious with all of the AI added stuff, for gamers, games that will utilize AI in some form, such as Arc Raiders and voices I was just reading, could they off load some work to said AI instructions locally to improve performance..
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voice are pre made as regular audio file at the studio not infered on the edge device (nor on the server while you play), but text to voice is something recent cpu can do in realtime well enough in my experience yes if they ever push it to be that dynamic and not prerecorded (the issue is more generating fast enough what to say than the text to voice process), no need for gpu level for it.
 
DukenukemX said:
AMD should release Zen6 soon because Apple already beat them to the punch and their M5 chips are making Ryzen look dated.
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TSMC N2 is not cheap tho.

Expect desktop chips in 1 years time

Laptop chips (TSMC 3nm) in 2027
 
LukeTbk said:
but text to voice is something recent cpu can do in realtime well enough in my experience yes if they ever push it to be that dynamic and not prerecorded (the issue is more generating fast enough what to say than the text to voice process), no need for gpu level for it.
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So in 10+ years there will be a subscription model to license a large range of different famous voices in AI form so that you can pick and choose for the voices of the characters in your game or anime. Thus skipping the terrible voice acting frequently found in both industries and also customising it more to your own liking.
 
Mega6 said:
Just AI stuff. The only real benefit for gamers is the die shrink and maybe the 16 core cpu CCX down the road.
Click to expand...
Not necessarily. There are a number of math based distributed computing CPU projects which take advantage of AVX and the speedup of computing is more than considerable. It's not just for AI stuff. I wouldn't be surprised if there will be additional advantages to it for more everyday type computing just like what happened with MMX and SSE but until AVX is ubiquitous few software makers will make general use of it. This is one of the advantages of some Linux distros which have additional package forks which take advantage of different architectures of different CPUs and one which gives some of the biggest gains are AVX and especially AVX-512.
 
Marees said:
TSMC N2 is not cheap tho.

Expect desktop chips in 1 years time

Laptop chips (TSMC 3nm) in 2027
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I thought 2nm was with Zen6?
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The seventh-generation EPYC processors, codenamed "Florence," are where AMD's new die-stacking strategy truly shines. Florence apparently tops out at an immense 288 cores, achieved by combining two high-end "Dwarka" I/O dies, dual "Mathura" memory controller dies, and eight unique "Steamboat" CCDs that are described as "C3Ds".

Steamboat is a radical departure that has no L3 cache on the CCD itself.

Instead, it pairs the "C3D" with a dedicated 3D-stacked cache die underneath that provides a massive 7MB of L3 per core, allowing top-tier EPYC configurations to wield nearly 2GB (2016 MB) of total L3 cache.

https://hothardware.com/news/amd-zen-7-leak-reveals-major-ipc-gains-and-huge-cache-upgrades
 
Zen 7 one year after Zen 6 I find doubtful. AMD would probably not even have their full Zen 6 lineup out in 2028. Just rumors or planted mis directions.
 
noko said:
Zen 7 one year after Zen 6 I find doubtful. AMD would probably not even have their full Zen 6 lineup out in 2028. Just rumors or planted mis directions.
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server zen 6 is out now

server zen 7 (florence) is already on the helios rack roadmap of 2028 (mi 600)

client zen is a totally different story
 
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noko said:
Zen 7 one year after Zen 6 I find doubtful. AMD would probably not even have their full Zen 6 lineup out in 2028. Just rumors or planted mis directions.
Click to expand...

Marees said:
server zen 6 is out now

server zen 7 (florence) is already on the helios rack roadmap of 2028 (mi 600)

client zen is a totally different story
Click to expand...

just to clarify CDNA / Helios is the cash cow for AMD

Epyc / zen just tags along

CDNA must increase every year

whatever zen/epyc is available will be plugged into the rack
 
Marees said:
just to clarify CDNA / Helios is the cash cow for AMD

Epyc / zen just tags along
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Maybe in the near future, but right now Epyc is incredible.

Look at the price tag per mm (of very high yield small chiplet) of silicon they can sales Epyc for and they sales the very expensive motherboard controller. CDNA-helios were still at nearly a lost effort not so long ago I think and probably still under AMD average net margin.

A really quick rough math seem to show about $10 per mm2 for top of the line epyc vs $12/$13 for MI455x yield adjusted....

But to sales that a little bit higher per mm of end silicon of gpu die, the Mi455x require about the most complicated and giant packaging on earth, with 432 GB HBM4 AMD need to pay for and they provide power delivery and some of the cooling interface, epyc come bare.... and end up probably with better gross marginal margin even before counting for the lower R&D for them per units sold and very importantly they can easily make as many they want, while total supply chain, packaging capacity and yield on MI455x is a little nightmare.

Epyc has been the main cash cow and driving force of AMD in recent years I think, and will continue to be for a while.
 
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