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Xeon Phi discussion

However you call it, these instructions are not present in its ISA == can't fold on any of the SMP FahCores.

EDIT: That said, the only option to fold on Phi is using GROMACS on OpenMM-on-OpenCL or porting GROMACS' "kernels" to Phi's ISA or (possibly) using GROMACS C kernels + intel's autovectorization.
     I honestly doubt any of these have been done...
 
Last edited:
tear said:
EDIT: That said, the only option to fold on Phi is using GROMACS on OpenMM-on-OpenCL or porting GROMACS' "kernels" to Phi's ISA or (possibly) using GROMACS C kernels + intel's autovectorization.
Click to expand...

Just get in touch with Stanford as all of those can easily and quickly be done.
 
402blownstroker said:
Their QA department really allows quick turn arounds for changes.
Click to expand...

And their developers are even better. I mean look how well the GPU client works with GCN! It's amazing they are able to get it optimized so well in so little time!
 
Does this mean the end of CPU folding in a year or two? Once it runs Folding one CPU with 4 of these bad boys (off Ebay) would beat any quad-CPU setup right? Price would of course be a factor and Folding needs to support so many threads, but the raw processing power.....
 
I read an article about Xeon phi+ScaleMP: http://goparallel.sourceforge.net/virtualized-symmetric-multiprocessing-eases-mic-transition/
It says that:
"ScaleMP virtualizes dual Xeon E5-2600 processors with 128 Gbytes and a 50-core Xeon Phi coprocessor board with 8 Gbytes of memory, making it appear to programmers as a virtual SMP with a 66-core Xeon processor and 136 Gbytes of memory"
"And even code that uses MMX, SSE, or AVX instructions that are not supported by the Xeon Phi will run without alternation, because vSMP traps those instructions and emulates them."
So folding on this platform should be possible?

tear said:
However you call it, these instructions are not present in its ISA == can't fold on any of the SMP FahCores.

EDIT: That said, the only option to fold on Phi is using GROMACS on OpenMM-on-OpenCL or porting GROMACS' "kernels" to Phi's ISA or (possibly) using GROMACS C kernels + intel's autovectorization.
     I honestly doubt any of these have been done...
Click to expand...
 
Emulation has been used for years for commercial workloads. The overhead is usually 6:1 to 10:1.
Emulating performance oriented instructions like AVX normally voids the very reason they are being used by the original program.

Unfortunately, for HPC computing nothing beats recompilation and architectural optimizationsto exploit the memory bandwidth and latency.
 
Has anyone tested out the new Xeon Phi 3120? If yes, how does it compare to the previous 5110P or perhaps even to the Tesla K20? This is the only model with an active cooling for desktop and it's more within budget range for most people (MSRP ~$1800 USD).
 
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