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Question: what generates the clock in a CPU?

R

RancidWAnnaRIot

EspantaPajaros
Joined
Feb 19, 2004
Messages
11,033
Hello,

I'm currently taking a Digital logic course in school. We've gotten to the point where we have designed a very simple and crude CPU, with 4 different instructions (2-bit instruction registry). In this class we generate the clock of the CPU by hand (a debounced switch which using a D-Flip Flop). My questions is, how the hell is the clock signal generated in your every day computers... are there little grimlins inside my PC making the debounced switch go from high to low really really really fast?? :rolleyes:

Or is it something that's more complicated, and at my current level cannot understand?

THanks...
 
Well...it's a little more complicated, but I'll bet your "current level" can understand it just fine.... :D

The simplest form of a clock would be a crystal oscillator. Now, oscillator crystals and their associated circuitry are rather fussy beasts. Ask any engineer that's designed clock circuits - getting them to "start" reliably is belive it or not sometimes a real challenge. It's a very analog circuit, with all the challenges of doing a robust analog circuit design involved. Easy to screw up, trust me on that one.

A better design would be to take a crystal oscillator, and buffer it's output such that you can't "load it down" or affect it's operation depending on how it's connected. These can be bought as "packaged oscillators" and the connections are typically power, ground, and the clock output which is buffered up to TTL levels; typically 3.3 or 5.0 volts depending. These work very well until you (1) need to send it to several places in the schematic while preserving the phase relationship of the clock signals, or (2) want to change the frequency of the clock.

The next level of complexity would be a "clock generator" IC. These incorporate an adjustable reference clock, so you have frequency diversity, and a "zero delay" buffer such that you can send the clock to various points around the design and maintain the phase relationship. The "secret" here is that there really is no such thing as a "zero delay" buffer, but you can certanly design a clock distribution scheme such that all the outputs have the same amount of delay (like picoseconds) such that the absolute phase of the clock is preserved. This is what you'll find on most modern motherboards, and are available from most of the big semiconductor compaines. TI, Cypress, Maxim, etc. all have them in their standard product catalog.

....did this answer your question..??

Regards - B.B.S.
 
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