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Native Quadcore in 2H07?

So since the four cores will be sharing one cache, I wonder if they're going to double the cache to 8mb or triple it to 12Mb like the long term rumor as quoted.

They probably need to triple it to offset the decreasing returns from putting all of those cores on one FSB, etc. Also, the dynamicly shared cache would be great even for apps that aren't multi-thread b/c they could use that whole 8-12Mb for just the single thread! (single thread games = FAST) I can see some insane benchmarks now for some apps that fit the whole data set in that large L2.

The only problem I see is binning, with 2 dual cores slapped together, I would think they could maximize the clocks / speed bins better.

Having to get lucky, rolling just 4 die (as in dice) and all 4 of them matching up for the highest value, is a lot harder than if you could roll tons of dice and pick an choose them to match up.
 
chrisf6969 said:
Having to get lucky, rolling just 4 die (as in dice) and all 4 of them matching up for the highest value, is a lot harder than if you could roll tons of dice and pick an choose them to match up.


I think this is one thing that will hurt AMD more than Intel.... Intel is arguably one of, if not the best, when it comes to production. If anybody can have the highest yields on this it's Intel IMHO. That's not to say that it will bankrupt AMD.... it's just Intel will have higher yields on this I would imagine.

Oh... and Quadcore now has 8mb of L2 cache, it's 4 on each die.
 
my post was not meant as making any statements with respect to whether "native" quad core is better, cheaper, worse or whatever in comparison to the MCM implementation. It was merely informational. I did a quick search and it appeared that nobody had posted this information.

Even if it turns out worse, having more choices is always a better option for consumers, is it not?
 
Poncho said:
Oh... and Quadcore now has 8mb of L2 cache, it's 4 on each die.

Yes, but its not all available to just one core. Its 2x4Mb, 4Mb for each pair of cores.

Now, if its Native quad core and all 4 cores share a single large 8mb+ cache, when you're running a single threaded app, it could have access to nearly ALL of that cache for itself. Which could create for some serious performance in single threaded apps.
 
If your talking about the upcoming Yorkfield processor slated for Q3 2007, then yes it is a "native" Quad Core, IMHO I beleive it is going ot have a Single pool of 8MB of Shared Cache across all 4 Cores given that this is a product slated for late in the life of the 65nm process.

We will have to wait for the 45nm Bloomfield sucessor to this unit, before we get a cache size upgrade IMO.
 
I dont see the point of going to native if its still 65nm.
I thought it would have been b/c the die was shrinking to 45nm that they would go to native. Oh well
 
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