- Joined
- Dec 19, 2005
- Messages
- 18,608
"“Row hammer is one of the leading issues in DRAM reliability and security, and has long been a frustrating plague on the memory industry. As DRAM’s longstanding major disturb problem, row hammering is only becoming more of a problem as cells shrink,” Charles Slayman, a device reliability expert at Cisco Systems, said in a press release.
According to Lewis, the new device is immune to this problem because the transistor channel is outside of the bulk of the silicon, and so it’s isolated from the wandering charge. “This is a root-cause fix for row hammer,” he says.
For use in DRAM, the device would have to be shrunk down considerably, which possible. But improving MRAM is the immediate goal. That will involve optimizing the strength of the drive current and other aspects of the device. Spin Memory engineers will be presenting details of Universal Selector next week at the 31st Magnetic Recording Conference."
https://spectrum.ieee.org/tech-talk...y/mram-startup-drams-row-hammer-vulnerability
According to Lewis, the new device is immune to this problem because the transistor channel is outside of the bulk of the silicon, and so it’s isolated from the wandering charge. “This is a root-cause fix for row hammer,” he says.
For use in DRAM, the device would have to be shrunk down considerably, which possible. But improving MRAM is the immediate goal. That will involve optimizing the strength of the drive current and other aspects of the device. Spin Memory engineers will be presenting details of Universal Selector next week at the 31st Magnetic Recording Conference."
https://spectrum.ieee.org/tech-talk...y/mram-startup-drams-row-hammer-vulnerability