I'm curious about the Core i7 cache mapping

[rflcptr]

Can a Core i7 user kindly post CPU-z results under the cache tab. I just wanted to compare these to my T7700 for fun and learning.

For example, my Core 2 Duo:

L1 Data cache (per processor) - 2 x 32 KBytes, 8-way set associative, 64-byte line size
L1 Instruction cache (per processor) - 2 x 32 KBytes, 8-way set associative, 64-byte line size
L2 cache (per processor) - 4096 KBytes, 16-way set associative, 64-byte line size

Thanks a bunch!

 

[#1RAGE]

This is what I get with my i7 920.

 

[ilkhan]

Some good info on nehalem caches http://www.anandtech.com/cpuchipsets/intel/showdoc.aspx?i=3461

 

[rflcptr]

Interesting that Intel engineers chose a 4-way set associative for the L1 Instruction cache.