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Conroe Cache?

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Gawd
Joined
Aug 21, 2006
Messages
625
I keep seeing all these information write-ups saying that the e6300 and the e6400 still physically have 4mb of l2cache, its just half has been disabled... Would it be possible at all to somehow re-ativate this disabled half?
 
Even if you COULD you wouldn't WANT to.
In most cases, something is only disabled due to it not working as it should. So, if it doesn't perform to spec, they just disable it, bin it lower, and still make some return on it. Otherwise, all chips would be X6800s, and they'd cost even more because they'd just throw out the ones that didn't make the grade rather than bin them lower.

-Ray
 
maybe with a laser capable of microscopic precision. (like they use to disable it in the first place)

I think people have been asking this same question since the Pentium 3 coppermine / Celeron coppermine. Or about changing the LOCKED multipliers since even earlier.

I believe Intel does all of its "locking" of things like cache, multiplier, or other technologies (like HT) with a LASER! So they severe a few bridges on the chip itself and bam its turned from a possible X6800 with 4Mb of cache & unlocked multipliers to a 6300 with locked 7x & only 2Mb cache. etc.
 
no the density of the memory of the cache on the E6300 and E6400, is less then on the E6600 and up. so there just isnt physically the extra memory there.

take this as a grain of salt, i think i just got it from the inq.
 
the density is actually lower? :confused:

it's also likely that there is a small section of the chip that is read only that dictates what the chip is and how much cache it has.. and where. find out how to reprogram that, and you might get the extra cache, but the cache is almost always disabled for a reason
 
chrisf6969 said:
maybe with a laser capable of microscopic precision. (like they use to disable it in the first place)

I think people have been asking this same question since the Pentium 3 coppermine / Celeron coppermine. Or about changing the LOCKED multipliers since even earlier.

I believe Intel does all of its "locking" of things like cache, multiplier, or other technologies (like HT) with a LASER! So they severe a few bridges on the chip itself and bam its turned from a possible X6800 with 4Mb of cache & unlocked multipliers to a 6300 with locked 7x & only 2Mb cache. etc.
Click to expand...

This is neat!

http://www.xbitlabs.com/news/cpu/display/20061018233136.html

More democratic pricing of quad-core chips is expected in the second half of 2007, when Intel releases its second-generation quad-core microprocessors made using 45nm process technology and support SSE4 instructions. The microprocessor code-named Yorkfield will feature single-die design as well as unified level-two (L2) cache, which should boost its efficiency when compared to Intel’s first-generation quad-core offerings that have two-dice design and have to cooperate using processor system bus (PSB).
Click to expand...

I've heard about L2 sizes of 6, 16 and 24MB. I wonder if some of these will start with small amounts and nothing to disable or cut off with lazers?
 
Hehe, arn't the dies attached to the chips backside up? Like, the insulating substrate is facing up.

Like, wouldn't you have to desolder it, flip it around, THEN lazer it :).
 
Arcygenical said:
Hehe, arn't the dies attached to the chips backside up? Like, the insulating substrate is facing up.

Like, wouldn't you have to desolder it, flip it around, THEN lazer it :).
Click to expand...
they dont call this place [H] for nothing!!
 
MrWizard6600 said:
no the density of the memory of the cache on the E6300 and E6400, is less then on the E6600 and up. so there just isnt physically the extra memory there.

take this as a grain of salt, i think i just got it from the inq.
Click to expand...

I think your memory density is lower for believing The Inq, and repeating it as fact! :p ;)

I'm pretty sure they're all using the same die. Later on they may tape out a new die for the Allendales with just 2Mb of cache. Depending on demand, etc..

Look at the early geforce 6200, 6800nu, etc... those are similar examples where they use the same die, but disabled part of it. Then later on they created a new die just for it. That will probably be the case with the 6300/6400's. Initially, while they are tweaking the yields on the 6600/6700/6800's and still getting a lot of chips with partially faulty cache, they're going to toss them in the 6300 bin. Once they've perfected it, they'll probably create a new die for the Allendales.
 
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