Intel: Disrupting the Data Center with Customizable Chips

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At the Gigaom Structure conference in San Francisco today, Intel’s Diane Bryant announced that the company will now offer customizable chips for the data center based on industry leading Intel® Xeon® processors. For the first time, Intel server customers will be able to incorporate their own software and IP via a field-programmable gate array (FPGA) integrated into the same package, which can be programmed for specific functions and workloads, like search or video compression, particularly as the patterns change. This is an example of Intel leading a massive transformation at the silicon level of the data center to drive increased value to our customers.
 
wonder how Fudzilla will spin this? Seems like a "me too" response to AMD's new strategies. Then again, I'm sure it's all a game of follow the money for any company.
 
You have it backwards there, JNavy. AMD's APU strategy is in response to Xeon Phi. :p

Actually this is probably a response to the story a few days ago of Microsoft's "Catapult" which is using FPGAs to accelerate certain server functions. http://www.wired.com/2014/06/microsoft-fpga/
 
* ... AMD's APU strategy for servers is in response...
 
pfft

x86-64, IMC etc... Intel copies plenty too ;)

at which point does *cross licensing* qualify as copying?

also, the IMC was an evolutionary step in a long history of both companies integrating components on-package (previously coprocessors, caches, then the IMC/northbridge functions, southbridge functions, iGPU, VRMs, and so on). ;)
 
ok maybe copy isn't the right term, but follow along???

Intel stated back in they day when Athlon 64 came out there was no place for X86-64. Evidently there was. Dual core cpus. They laughed at first, until demand was there. IMC they scoffed at too.

What I'm saying is that Intel likes to act they like they invent everything, kind of like Apple does. Yes, I'm sure AMD has "followed" intel more than the opposite, but when AMD started doing custom SoC's etc... The community laughed as if it was a last gasp of desperate hope. Now intel does it and it's supposed to be something remarkable???????????
 
Intel stated back in they day when Athlon 64 came out there was no place for X86-64. Evidently there was. Dual core cpus. They laughed at first, until demand was there. IMC they scoffed at too.
Pentium-D (Smithfield) and the Athlon X2 were both released in May 2005, with the Pentium D beating the X2 by a couple of weeks. :p

Intel did seem to be fixated on IA64, and AMD certainly benefited from the Netburst fiasco both on desktops and servers. Despite what Intel said publicly, it rushed to implement x86-64 in Prescott. I wouldn't say that x86-64 had a big demand on the desktop, but it had demand in a more profitable segment: servers.

I think some people have believe x86-64/AMD was something revolutionary or completely new. It's not. It's mostly just a straight-forward 64-bit register/memory addressing extension of the same x86 32-bit instruction set*, although with an extra 8 registers and a couple of new system management instructions. Intel had explored its own 64-bit x86 update back in the 1990s and decided against it (likely due to competition against IA64).

* examples, 32-bit vs 64-bit
inc ax vs inc eax
mov cx, ax vs mov ecx, eax
 
Pentium D was a cobbled together bridged example of two single cores put onto one dye as a knee jerk reaction to knowing A64 x2 was coming out.
Their response to dual core prior was "we don't need it we have HT".
 
No, Intel explained the reasons behind HyperThreading quite clearly from the start, which was to maximize pipeline utilization. Intel never stated it was a replacement for multi-core.

If by hobbled together/knee-jerk you actually mean it was in development for multiple years and consumed less power than two separate die. Both the X2, with its superior HTT based on the Alpha's EV6 bus, and Pentium-D were driven by the same thing: higher integration. Multi-socket compatible chips had been around for years, and it was logical to integrate more cores onto one chip. Obviously the higher bandwidth links AMD used had more benefits for scalability than Intel's FSB, on top of the other things like higher IPC and IMC the Athlon 64/Opteron and later models had. However, both there just 2 die in one chip with all the communication going through HTT (AMD) or FSB (Intel). It was years later before multi core x86 chips had higher levels of integration, such as shared caches and direct snooping into one another's caches and state.
 
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