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“Additional details include support for the FP4 data format alongside FP8, as well as large register files of 1 MB per core and an L1 cache of 512 KB per core. In total, there are 256 Vector engines and 256 of the new XMX engines, each divided into groups of eight per Xe3P core. Furthermore, the Xe3P lacks graphics processing elements for outputting imagery, as the silicon is designed purely for AI inference workloads that require long context and agentic tasks. A media engine with four encoders and four decoders is also included, which could assist with multimodal workloads where video generation and understanding are essential.


The accelerator is designed as a 350 W, air-cooled PCIe 5.0 x16 card, allowing it to fit into conventional server infrastructure without the need for dedicated liquid cooling. Intel designed this silicon with agents performing thousands of steps, handling a 100K context, maintaining that context, and reasoning, all while serving tokens at high speeds. We have yet to see what real-world performance looks like and what Xe3P graphics IP can do for AI processing.“
Source: https://www.techpowerup.com/354171/...ie-shows-up-32-xe3p-cores-and-256-xmx-engines


The accelerator is designed as a 350 W, air-cooled PCIe 5.0 x16 card, allowing it to fit into conventional server infrastructure without the need for dedicated liquid cooling. Intel designed this silicon with agents performing thousands of steps, handling a 100K context, maintaining that context, and reasoning, all while serving tokens at high speeds. We have yet to see what real-world performance looks like and what Xe3P graphics IP can do for AI processing.“
Source: https://www.techpowerup.com/354171/...ie-shows-up-32-xe3p-cores-and-256-xmx-engines