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Recent content by J105rob

  1. J

    PCIE Bifurcation

    C_Payne Or just the schematic surrounding the zero delay buffer or a hint to the application note you sourced? I am breaking out a x16 to four x4 OCuLink connectors for fly-over cables in my design.
  2. J

    Any chance you would share a schematic of your design?

    Any chance you would share a schematic of your design?
  3. J

    PCIE Bifurcation

    Any chance you would share your design? I have a need to break out a x16 into 4 x4... I have Altium for my design tooling and I promise to keep any Licenses you want or need to include in tact in the final product.
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