erek
[H]F Junkie
- Joined
- Dec 19, 2005
- Messages
- 11,104
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And 6.0 isn't even released yet lol.they sure are pumping these out. there's people that dont have pcie5 yet
im still on pcie2 since the Z97 implementation for pcie3 was bugged and causes issues lolthey sure are pumping these out. there's people that dont have pcie5 yet
Games, like almost every other app that runs on computers, are bottlenecked by 1) sloppy, inefficient coding, and 2) Legacy crap code from days gone by (16/32bit pieces) and 3) primitive backwards compatibility with old stuff like pcie gens 1 & 2...games for example are bottlenecked in other ways
Specs have to precede rollout by quite a bit. It takes time to do all the design and engineering. So often you will see something like whatever is being rolled out now, the spec for the next version is either final or near final, and the spec for the version after that is under development. Remember that once a spec is complete it isn't like companies just start building it. Once a spec is complete companies can start working on solving the problems of implementing it, which can take awhile, then actually design products that use it, then manufacture those products. A spec that gets ratified today can easy be 2 years or more from having hardware on the market that implements it.And 6.0 isn't even released yet lol.
Specs have to precede rollout by quite a bit. It takes time to do all the design and engineering. So often you will see something like whatever is being rolled out now, the spec for the next version is either final or near final, and the spec for the version after that is under development. Remember that once a spec is complete it isn't like companies just start building it. Once a spec is complete companies can start working on solving the problems of implementing it, which can take awhile, then actually design products that use it, then manufacture those products. A spec that gets ratified today can easy be 2 years or more from having hardware on the market that implements it.
With interconnects, we want to try and stay ahead of the game. You want a situation where the PCIe sockets on your motherboard are faster than you need, because you don't want to get to a situation where we have neat new hardware that is hamstrung by interconnect speed.
Yeah, that.Maybe we will not care, but maybe we will get GPU using 4-8 lane, hard drive using 1 lane, making possible for simple CPU to become quite the workstation affair (but there would a lot of incentive for that never happening and the industry continuing to push 4 lane harddrive, x16 gpus and keeping entry level board to one GPU-3/4 drive with not much else to keep an high end)..
1x Gen 6 would already be quite a lot of a lot of stuff, a single lane would maybe be ok for a 40gbs network card, most harddrive case, and so on.
Well. what happens if the designers discover a flaw in the specs, or a spec detail that is very hard/impossible to implement?Once a spec is complete companies can start working on solving the problems of implementing it, which can take awhile, then actually design products that use it, then manufacture those products.
They go throught a lot of revision I think:Well. what happens if the designers discover a flaw in the specs, or a spec detail that is very hard/impossible to implement?
Why do you think there's so much time when it is getting revised and set up? They spend time working on the spec in no small part to make a spec that is going to be doable with the technology that is available.Well. what happens if the designers discover a flaw in the specs, or a spec detail that is very hard/impossible to implement?
they sure are pumping these out. there's people that dont have pcie5 yet
Well for so long there was barely anything pushing the limits of PCIE3, and the very few things that were used custom solutions to work around it. So PCIe4 wasn't really needed until solid-state memory really became a mainstream item. And now it's AI and other accelerators that are pushing the envelope.There's a pretty big pipeline on these things, and I think the consortium decided to push towards a faster release cycle after pci-e 4.0, because 7 years was too long.
That's a reason to keep on top of it with interconnects though: you never know when the next thing will come that'll need it.Well for so long there was barely anything pushing the limits of PCIE3, and the very few things that were used custom solutions to work around it. So PCIe4 wasn't really needed until solid-state memory really became a mainstream item. And now it's AI and other accelerators that are pushing the envelope.
What he said.I'd much rather that our interconnects were faster than we need than for something new to come out and have great potential but be hamstrung by insufficient interconnect speed.