DooKey
[H]F Junkie
- Joined
- Apr 25, 2001
- Messages
- 13,554
TSMC is showing off their new Wafer-on-Wafer (WoW) chip stacking technology and it might be a boon for multichip solutions in the future. The technology allows two dies to sit on top of each other and this allows interconnects to be very short and minimizes transfer times between them. Imagine the new Intel and AMD EMIB chip utilizing this technique and you can imagine how much space it would save. I think it would be great for multi GPU processors as well since the boards wouldn't have to put the chips side by side and then run traces all over the place. Hopefully this will make it to market in the near future and work with high performance processors. The future looks bright.
Notice that this new tech is called Wafer-on-Wafer and not die-on-die, this technique stacks silicon while it is still within its original wafer, offering advantages and disadvantages.
The advantage here is that this tech can connect two wafers of dies at once. Imagine an alternative method where we connect individual dies in the same way, offering a lot less parallelisation within the manufacturing process and the possibility of higher end costs.
Notice that this new tech is called Wafer-on-Wafer and not die-on-die, this technique stacks silicon while it is still within its original wafer, offering advantages and disadvantages.
The advantage here is that this tech can connect two wafers of dies at once. Imagine an alternative method where we connect individual dies in the same way, offering a lot less parallelisation within the manufacturing process and the possibility of higher end costs.