Samsung Plans 3nm Gate-All-Around FETs in 2021

Megalith

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According to the company’s latest processor technology roadmap, Samsung aims to mass produce gate-all-around (GAA) transistors (the architectural successor to FinFETS) at the 3nm node in just three years. They will be preceded by 7nm Low Power Plus based on EUV lithography this year, followed by 5nm FinFET production in 2019 and 4nm FinFET production in 2020.

GAA technology has been under development since the early 2000s by Samsung and other firms. GAA transistors are field-effect transistors (FET) that feature a gate on all four sides of the channel to overcome the physical scaling and performance limitations of FinFETs, including supply voltage.
 
3nm damn... a few dozen atoms wide. Wonder at what point do small scale quantum effects take over
 
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3nm damn... a few dozen atoms wide. Wonder at what point do small scale quantum effects take over

Quantum effects have been around for a long time. Why do you think we even have multi gates?

And small scale = quantum no real difference ;-)
 
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3nm damn... a few dozen atoms wide. Wonder at what point do small scale quantum effects take over

The naming scheme is also a little misleading as I believe after intel's 45nm process, the gate length and M1 half pitch are no longer used to determine node size.

This page has some nice info on the 10nm process if you're interested.

https://en.wikichip.org/wiki/10_nm_lithography_process

Edit: Here's a page that mentions some of the ideas behind the naming logic.

https://newsroom.intel.com/editorials/lets-clear-up-node-naming-mess/
 
If they keep making up these dimensions, they'll have to start using negative digits.
 
3nm damn... a few dozen atoms wide. Wonder at what point do small scale quantum effects take over

Electron tunneling became a significant issue with 45nm designs. They made 45nm possible by doping gates with Hafnium. Each step down from there has involved greater and greater challenges.
 
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