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Researchers from Tohoku University in Japan say they've developed a 128mb MRAM test chip that can achieve a write speed of 14 nanoseconds. The researchers say that's "currently the world's fastest write speed for embedded memory application with a density over 100Mb." The title of the associated paper also mentions that the memory has an endurance "greater than 1010," and that it can retain data for 10 years at 85 degrees Celcius, and the press release says it only need 1.2V to operate. As we've noted before, MRAM has the potential to replace specific uses cases for SRAM, eDRAM, and significantly slower non-volatile storage in the near future, and Intel is supposedly shipping products with 14nm MRAM right now. Thanks to cageymaru for the tip.
STT-MRAM is capable of high-speed operation and consumes very little power as it retains data even when the power is off. Because of these features, STT-MRAM is gaining traction as the next-generation technology for applications such as embedded memory, main memory and logic. Three large semiconductor fabrication plants have announced that risk mass-production will begin in 2018... The current capacity of STT-MRAM is ranged between 8Mb-40Mb. But to make STT-MRAM more practical, it is necessary to increase the memory density. The team at the Center for Innovative Integrated Electronic Systems (CIES) has increased the memory density of STT-MRAM by intensively developing STT-MRAMs in which magnetic tunnel junctions (MTJs) are integrated with CMOS. This will significantly reduce the power-consumption of embedded memory such as cache and eFlash memory.
STT-MRAM is capable of high-speed operation and consumes very little power as it retains data even when the power is off. Because of these features, STT-MRAM is gaining traction as the next-generation technology for applications such as embedded memory, main memory and logic. Three large semiconductor fabrication plants have announced that risk mass-production will begin in 2018... The current capacity of STT-MRAM is ranged between 8Mb-40Mb. But to make STT-MRAM more practical, it is necessary to increase the memory density. The team at the Center for Innovative Integrated Electronic Systems (CIES) has increased the memory density of STT-MRAM by intensively developing STT-MRAMs in which magnetic tunnel junctions (MTJs) are integrated with CMOS. This will significantly reduce the power-consumption of embedded memory such as cache and eFlash memory.
