Possible Patent For Post Navi GPU Architecture Spotted

AlphaAtlas

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Previous roadmaps suggested that AMD would move away from the GCN architecture after Navi, but we may have just gotten a little more detail on what the next gen "Arcturus" GPU could be. KOMACHI_ENSAKA, one of the first Twitter users who spotted the allegedly leaked Gonzalo APU, just found a patent filed by AMD last month for what may be a post Navi GPU architecture. According to PCGamesN's initial analysis of the new patent, as well as an another patent that surfaced in May last year, the new GPU will move some of the resources shared within a compute unit into the individual stream processors, which the author suggests is similar to the approach used by Nvidia's more recent architectures.

With AMD’s graphics architecture already heavily compute-focused anyway, the next-gen Arcturus (maybe) design could end up being a monster on that front. And with that much complex silicon inside each stream processor in the compute unit – not a million miles away from the streaming multiprocessor (SM) design Nvidia has been using to pack out its own GPUs with – there’s the potential for not only the WinML promise of a DLSS-like feature, but genuine DXR support could also find its way into the 2020 AMD architecture. The flip-side of the more complex stream processors is that they should also represent a lower power system too. It is designed to bypass certain buffers and avoid the duplicated use of resources, and has a cache recycling system which means it doesn’t need to re-fetch data the stream processor needs to work on again.

I skimmed through the patent, and while I think I see references to things (like cache/memory operations) that AMD's individual stream processors don't normally handle, it's all way over my head.
 
That's a programmable stream processor, which falls in line with it possibly being AMD's foray into hardware real time ray tracing.

On page (2) of the patent - note vector math (matrix multiply) a*b+c

AMD_FMA_patent.png


Here - nvidia tensor core:

nvidia_tensor_core.png


It's the same FMA operation that the patent specifies for the stream processor as the Nv tensor core.
 
I don't generally bother reading patent applications, but boiled down does it amount to: graphics core next, the next generation?
 
I don't generally bother reading patent applications, but boiled down does it amount to: graphics core next, the next generation?
Long story short - the patent appears to be AMD's equivalent version of tensor cores that provide the same matrix operation / vector math i.e. FMA in hardware.
 
It makes sense, though real time ray tracing needs time to mature, AMD wants to make bank on future console iterations and I'm sure as the technology matures Sony and Microsoft are going to jumping over each other to be the first to get a system out the gate with it.
 
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