PCPer Questions TheKanter on Ryzen

FrgMstr

Just Plain Mean
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David Kanter is known to be quite a smart felling when it comes to CPU architectures and he has shown that repeatedly. PCPer has an hour long interview with him that covers all the bases he put forward in this article for The Linley Group. This is worth your time if you are a CPU junkie.

David was kind enough to spend an hour with us to talk about a recently-made-public report he wrote on Zen. It's definitely a discussion that dives into details most articles and stories on Zen don't broach, so be prepared to do some pausing and Googling phrases and technologies you may not be familiar with. Still, for any technology enthusiast that wants to get an expert's opinion on how Zen compares to Intel Skylake and how Ryzen might fare when its released this year, you won't want to miss it.
 
Kaby lake has advantage in IPC and Zen 8 core CPU has advantage if your application can use all 8 processors. That's what I got from the video.
 
Please don't f... this up AMD... we need a competitive product to Intel's mainsteam CPU's
Sounding like a broken record, but we do... Really hope it's Single Core performace is up to par and can give Intel a run for it's money... Don't get me wrong, i've been purchasing Intel for my last well ALL CPU's but 8 Cores and 8 Threads... im liking those numbers :) would be nice when encoding Video and other CPU intensive stuff.

Aaaaand if not i'll just take a 7700K, delid it and OC the [H] out of it :D
 
My takeaways (please correct me if I'm wrong):
1) Cautiously optimistic about Ryzen
2) Performance should theoretically fall in between Ivy and Broadwell but not buying into marketing claims like "40% improvement in IPC"
3) AMD's move to outsource producing their chips and business structure hasn't worked for them in contrast to Intel's business model
 
I for one, don't want to see more "promises of Ryzen"... I want to see Ryzen!!

Can we ban all articles on it until it exists? (that is, I can get one?)

I still fear they are hyping themselves up for a big fall.
 
So in short; taking very little from last generation, much better power management, nerfing SIMD since no one is really making an effort for realtime uses (most mainstream developers are only catching onto multiprocessing practices, so Zen capitalizes on that instead), putting more focus on reducing op-cycle latency and losing some data performance, simplifying caching by a lot (one-way L3, Large L2) and isolating cache from main memory, however L1 is overlayed onto L2 for core sharing efficiency, reducing floating point capability (multiply-accumulate) with the intent of offloading to GPU since that's all they do anyway, taking a gamble by simplifying address generation, finally thinking about decent branch prediction, simplifying fabrication.

All in all, sounds pretty cool. Still concerned about PSP (or TrustZone feature), but we will see what product lines have or have not.
 
So in short; taking very little from last generation, much better power management, nerfing SIMD since no one is really making an effort for realtime uses (most mainstream developers are only catching onto multiprocessing practices, so Zen capitalizes on that... reducing floating point capability (multiply-accumulate) with the intent of offloading to GPU since that....

I thought compilers were starting to use vector ops (SIMD) because stack based approaches of the GPU were considered archaic
 
I don't like the nerfing of SIMD as that will hurt them in the HPC market I think unless they are betting the farm that GPUs will take up the slack
 
I don't like the nerfing of SIMD as that will hurt them in the HPC market I think unless they are betting the farm that GPUs will take up the slack

Are they still focusing on HSA or is that over with now? Was HSA only for APUs or did that apply to CPUs with dedicated GPUs as well?

I'm not an expert on these things, but it would seem intuitive that if an efficient pathway existed when the right resources were in play, then as long as there are CPU and GPU resources available in the system, the software could utilize the best pathway accordingly - or am I way off the grid on this?
 
I think HSA is dead. OpenCL and HSA and the APUs were supposed to revolutionize the whole industry and haven't really done so.

Apple did something with Grand Central Dispatch (GCD) to better take advantage of multi core systems and make it easier for developers but nothing along the lines as grand as what AMD was hoping.

So yes it's probably dead and AMD is focusing on being simpler which is probably a good thing.
 
I watched the whole video ;)

I was kind of amazed that you could find a way to not talk about a major subject and delve into all of the minor subjects and still come of not saying anything substantial (which came down to maybe it will work or maybe it won't).

The very long pauses on Kanter's part were so annoying and the answers led to absolutely nothing. The best I got out of this how they did things on the previous generation.



TLDR: They ditched most of the Bulldozer features and still have no clue on what they did do (beside the obvious SMT vs CMT).
 
Patiently waiting for 2016.

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https://www.extremetech.com/computi...12-cpu-cores-confirms-next-gen-memory-support
 
I thought compilers were starting to use vector ops (SIMD) because stack based approaches of the GPU were considered archaic

I've only ever toyed with SIMD, but yes; after enabling a few flags, any low complexity operations are immediately optimized and performed in parallel up to the available register space. And the prevalence of low complexity operations is definitely a good argument for nice and wide registers. In contrast, a high complexity iteration with good data representation could be further optimized to use more of the processor's functions in parallel, doing more work with less, but that high complexity is rare. Low hanging fruit gets picked, and the benchmarks will tell.

Anyway, I should shut up before I start writing example code. I'm so busy this week, lol.
 
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