Nvidia, Western Digital at Chips’ Frontier; RISC-V

[rgMekanic]

An article from Barron's details a conference call about RISC-V. RISC-V is a non-profit foundation founded by U.C. Berkeley professor David Patterson and his team to create one single “instruction set architecture” that can be used across all manner of chips, from the humblest embedded part on up to big server computers, and it is apparently gaining traction. Both Nvidia and Western Digital have announced that they will be using the RISC-V ISA in upcoming products. Nvidia plans to use it in all the "Falcom" CPU's it's putting into GPUs, and Western digital stated it will use RISC-V in all it's processors.

While I wholeheartedly agree that we need a new, modern ISA, I just don't think it's going to happen. X86 is just too entrenched into everything, and the only way for a new ISA to work, would be if were backwards compatible with X86, something I don't think Intel would ever let happen.

Patterson, and RISC-V, made a big splash a year ago, when he described work that had been done at Alphabet’s (GOOGL) Google to develop so-called “tensor processor unit” for Google’s cloud computing operations. The TPU, which Patterson and his team claim can achieve vast improvements in performance and efficiency versus Intel and Nvidia chips, was itself a result of work on RISC-V

 

[BSmith]

Ohhhhh, I like this. I hope it gets some serious traction. It has the potential of bringing in a lot of competition into the CPU market.

 

[dgingeri]

There is another way it could work. If a RISC-V system could mount an x86 processor as a secondary with specific mechanics to send x86 software to a VM structure running on that secondary processor, then it could still run the old software without emulation. Then software could be migrated to the new ISA and eventually remove the secondary processor and the software mechanism around it.

 

[PaulP]

For embedded systems, ARM is currently king, but as long as the current code can compile on another architecture, that segment is not as resistant to change as the desktop world.

 

[dgingeri]

For embedded systems, ARM is currently king, but as long as the current code can compile on another architecture, that segment is not as resistant to change as the desktop world.

Simply recompiling is not enough to make it work on another platform. There are many situations that require adjustment within the code to get it to work with a new platform. pfsense is a perfect example of this. Many people have wanted an ARM version of pfsense, and they eventually came out with one, but it is far behind the main x86 line in updates because some of the updates to the x86 branch do not work at all with ARM.

 

[TroubleMagnet]

Apparently people still don't realize that the first thing modern x86 chips do is break up the instructions into smaller RISC like instructions to send to the core. This is simple to do and costs basically nothing at this point. The instruction set is not the reason Intel failed to get a share of the mobile market, it had to do with features, schedule, and total cost. The instruction set isn't holding back perfomance.

The reason ARM hasn't taken off for servers is the performance isn't there yet. They're getting closer but why would anyone go to the work of porting their code if they're going to end up paying more or have lower peak performance than just sticking with x86?

They might get some traction vs. ARM simply because it's cheaper in some markets.

 

[raz-0]

There is another way it could work. If a RISC-V system could mount an x86 processor as a secondary with specific mechanics to send x86 software to a VM structure running on that secondary processor, then it could still run the old software without emulation. Then software could be migrated to the new ISA and eventually remove the secondary processor and the software mechanism around it.

That's been done with Sun sparc processors. IT worked like shit. It'll still work like shit.

The only place a non x86 ISA is going to work is for computing tasks where x86 is a bad fit and doesn't perform well.

 

[Zarathustra[H]]

Nvidia is all for open standards as long as it benefits them.


Watch them build some new technology ontop of RISC-V, patent it and then use it to lock people in to the Nvidia implementation, breaking the whole point of the open standard.

That's the kind of think Nvidia does.

I am a reluctant customer of theirs. I hate the fact that I give my money to a company that plays the lockout proprietary standards game, but right now, to get the performance I need, I just don't have a choice.

 

[dgingeri]

That's been done with Sun sparc processors. IT worked like shit. It'll still work like shit.

The only place a non x86 ISA is going to work is for computing tasks where x86 is a bad fit and doesn't perform well.

Which is just about everything these days. x86 has so much overhead, not even the processors that use it actually use it anymore. They convert it to RISC instructions internally, and have for over a decade now. x86 is old and busted. We need the new hotness.

 

[TroubleMagnet]

Which is just about everything these days. x86 has so much overhead, not even the processors that use it actually use it anymore. They convert it to RISC instructions internally, and have for over a decade now. x86 is old and busted. We need the new hotness.

Do we really though? Keeping x86 doesn't hurt performance, so moving to a new instruction set gets you what again? Is it really overhead for anyone not writing assembly?

Even Intel can't get people to move, remember IA64?

 

[WhoMe]

Haven't really looked into it much, but I'd say the paradigm shift away from x86 will make the most sense when we get quantum computers.

 

[dgingeri]

Do we really though? Keeping x86 doesn't hurt performance, so moving to a new instruction set gets you what again? Is it really overhead for anyone not writing assembly?

Even Intel can't get people to move, remember IA64?

We can absolutely say that keeping x86 is indeed hurting performance. Current processors Have to have extra overhead to convert x86 commands into custom RISC commands. The Bulldozer architecture suffered greatly because it only had 3 decoders to feed 4 integer pipelines across the 2 integer cores. The decoder efficiency has a major impact on processor performance, and they have a major influence on how fast the processor can clock. Without that aspect, processors would likely reach higher clock speeds and have better instructions per clock at the same time.

In addition, if the replacement instruction set is engineered well enough, it could mean far more efficient software by breaking out instructions into smaller, more efficiently run instructions and building in better instruction level parallelism. I don't know how well RISC-V is engineered, but it is likely far better than x86 in this area.

 

[MrDeaf]

Much like in the days of IBM and Motorola building Apple's PowerPC, RISC, processors, I feel that this alternative processor is only as good as the companies behind it.

Motorola, and then IBM, dropped the ball with PowerPC. I would have to guess it had something to do with funding, or lack there of.

 

[Red Falcon]

While I wholeheartedly agree that we need a new, modern ISA, I just don't think it's going to happen. X86 is just too entrenched into everything, and the only way for a new ISA to work, would be if were backwards compatible with X86, something I don't think Intel would ever let happen.

x86_64 isn't in *everything*, though, as ARM and ARM64 have started to gain serious traction in the last few years.
With the latest Meltdown and Spectre (CPU agnostic) issues, though, other processor ISAs outside of x86_64 have started looking pretty good lately.

But at the end of the day, you aren't wrong, and x86_64 isn't going anywhere for the near future, nor is the vast library of software or operating systems for this architecture, either.
I am very interested to see what comes of RISC-V, and I had no idea that it was behind the Tensor Processing Units' development.

 

[aaronspink]

Which is just about everything these days. x86 has so much overhead, not even the processors that use it actually use it anymore. They convert it to RISC instructions internally, and have for over a decade now. x86 is old and busted. We need the new hotness.

This meme really needs to die. It is complete BS. Yes they break up some insructions and use an internal format. But guess what? So do basically every high performance OoO RISC ISA based processor as well. No one is converting to RISC instructions.

And the reality is that with modern transistor budgets, ISA basically doesn't matter from a hardware design perspective. They matter to software but not to hardware.

 

[aaronspink]

x86_64 isn't in *everything*, though, as ARM and ARM64 have started to gain serious traction in the last few years.
With the latest Meltdown and Spectre (CPU agnostic) issues, though, other processor ISAs outside of x86_64 have started looking pretty good lately.

But at the end of the day, you aren't wrong, and x86_64 isn't going anywhere for the near future, nor is the vast library of software or operating systems for this architecture, either.
I am very interested to see what comes of RISC-V, and I had no idea that it was behind the Tensor Processing Units' development.

Have ARM gained serious traction? From my perspective, they are largely dominating the same markets they dominated for the past 20 years: embedded and mobile devices. The only thing that has changed is the size of the mobile devices market has gotten larger. And other ISAs have processors that are just as vulnerable to both Spectre and Meltdown (including ARM).

 

[Red Falcon]

Have ARM gained serious traction? From my perspective, they are largely dominating the same markets they dominated for the past 20 years: embedded and mobile devices. The only thing that has changed is the size of the mobile devices market has gotten larger. And other ISAs have processors that are just as vulnerable to both Spectre and Meltdown (including ARM).

This is a good thread to show where exactly ARM is at:
https://hardforum.com/threads/arm-server-status-update-reality-check.1893942/

Yes, Spectre is CPU ISA agnostic (assuming the CPU has speculative execution), but not all CPU ISAs are vulnerable to Meltdown, regardless of whether or not the CPU uses out-of-order execution.
https://www.techarp.com/guides/complete-meltdown-spectre-cpu-list/3/

For example, the ARM A9 uses out-of-order execution, yet is not vulnerable to Meltdown, just as an example.

 

[aaronspink]

This is a good thread to show where exactly ARM is at:
https://hardforum.com/threads/arm-server-status-update-reality-check.1893942/

Which is basically no-where outside of their traditional markets.

Yes, Spectre is CPU ISA agnostic (assuming the CPU has speculative execution), but not all CPU ISAs are vulnerable to Meltdown, regardless of whether or not the CPU uses out-of-order execution.
https://www.techarp.com/guides/complete-meltdown-spectre-cpu-list/3/

For example, the ARM A9 uses out-of-order execution, yet is not vulnerable to Meltdown, just as an example.

There are multiple ARM ISA processors that are vulnerable to meltdown.

 

[Red Falcon]

Which is basically no-where outside of their traditional markets.

I said that ARM and ARM64 were making serious traction in the last few years, I just never said in which markets... ya got me.

There are multiple ARM ISA processors that are vulnerable to meltdown.

Yep, and there are some that aren't vulnerable to meltdown, but I suppose the same could be said for x86_64 at this point.

 

[tempertantrum]

Do we really though? Keeping x86 doesn't hurt performance, so moving to a new instruction set gets you what again? Is it really overhead for anyone not writing assembly?

Even Intel can't get people to move, remember IA64?

x86 totally needs to die, it's the best for a lot of things... for now, but that's changing as we try to converge architecture and OS for different devices (embedded, mobile, server, etc.). x86 is terrible for low power devices. ARM is catching up in the high powered ranges, but frankly, I'd rather just see a universal standard, so instead of competing and fractioning the market things just work.

 

[TroubleMagnet]

This meme really needs to die. It is complete BS. Yes they break up some insructions and use an internal format. But guess what? So do basically every high performance OoO RISC ISA based processor as well. No one is converting to RISC instructions.

And the reality is that with modern transistor budgets, ISA basically doesn't matter from a hardware design perspective. They matter to software but not to hardware.

Yup, the amount of die area the logic for this uses in tiny and it keeps getting smaller relative to the rest of the logic every generation.

There are some ARM64 based servers now but if you compare them to x86 they're slower both in IPC and clock rate. They're only good for workloads that can use a bunch of CPU cores (vs. GPU) that don't need to be that fast. For those, their low price can make them attractive. Too bad for them that type of workload isn't a big chunk of the server market.

Their primary example of using this (TPU) is also a really poor example because it's a specialized chip for one specific task. It's like saying we should stop using CPUs and move to GPUs only.