New AMD CPU patent reveals 3D-stacked machine learning accelerator design

[kac77]

New AMD CPU patent reveals 3D-stacked machine learning accelerator design​

On September 25, 2020, AMD issued a patent for a unique processor that offers a machine learning (ML) accelerator vertically stacked on the I/O die, or IOD. AMD may be preparing a data center-based system-on-chips (SoCs) with incorporated FPGA (Field Programmable Gate Arrays) or machine learning accelerators for specialized GPUs. AMD will possibly add an FPGA or GPU on top of its processor I/O die, similar to how AMD adds specialized cache to their newest processors.
-Wccftech
-Jason R. Wilson

 

[sc5mu93]

Just to be upfront, not bagging on the poster, but the article itself. Such a horribly written article. I wish these people would do a little studying on how the patent office works before they write. Online journalism has steadily been going downhill, but wccftech was already at the bottom of the hill, so I guess it is to be expected.

AMD doesn't "issue" anything. AMD filed an application for a patent. The application was filed on September 25, 2000. It was published on March 31, 2022.
The application has not been examined yet by the USPTO (which has the power to "issue a patent"). (you can check this in the file wrapper available to everyone in USPTO Public Pair - which the wccftech should have done. Search on application number 17/032778)
Here is the appft link of the whole application.
Who knows if this will ever become an issued patent.