MRAM Found to Outperform SRAM Cache at 5nm

Discussion in '[H]ard|OCP Front Page News' started by AlphaAtlas, Dec 6, 2018 at 9:06 AM.

  1. AlphaAtlas

    AlphaAtlas Gawd Staff Member

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    As we've said before, Moore's law is slowing down and new nodes become less practical, so semiconductor companies and institutions are pouring more and more time and resources into alternative memory research. Magnetoresistive random access memory is one of the more promising alternatives, and new research suggests it can outperform SRAM in CPU caches on the upcoming 5nm node. This is the sort of cache you'd see marked as L1, L2, or L3 on a CPU spec sheet, and the research by IMEC suggests that MRAM can get the job done using less power and less die area, all while retaining data when the power goes out. MRAM's advantages are particularly pronounced in caches over about 5MB, as MRAM's standby power apparently scales much better with cache size than SRAM's. That means this technology would probably show up as L2 or L3 in high end processors before anything else.

    "For the first time, DTCO and silicon-verified models allowed us to conclude that the STT-MRAM energy becomes more efficient as compared to SRAM for high-density memory cells beyond 0.4Mbytes and 5Mbytes density for read and write operations, respectively. The comparison also reveals that the latency of the STT-MRAM is sufficient to meet the requirements of the last-level caches in the high-performance computing domain, which operate around 100MHz clock frequency," said Gouri Sankar Kar, program director at IMEC, in a statement. It should be considered that further improvements are expected to come with spin-orbit torque MRAMs now emerging from research and that show superior characteristics.
     
    Last edited: Dec 11, 2018 at 7:04 PM
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  2. umeng2002

    umeng2002 Gawd

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    Now a magnet will crash your PC or corrupt your cache at the least?
     
  3. Galvin

    Galvin 2[H]4U

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    5nm, hell we don't even have the 7nm out yet
    And poor intel is still stuck on 10nm

    This one will be a while before we see it
     
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  4. AtomClock

    AtomClock n00bie

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    I predict that "while retaining data when the power goes out" will lead to some sort of exploit. You heard it hear first!
     
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  5. seanreisk

    seanreisk Gawd

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    I am old. When I read this my first thought was, "They can't use MRAM, that stuff uses too much power."

    And MRAM did use a lot of power. Back in the 1990's, which was the last time I read anything about it.


    P.S. Time to schedule another colonoscopy. Hey, when did Nirvana become classic rock?
     
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  6. DogsofJune

    DogsofJune [H]ard|Gawd

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    When Cobain shot himself
     
  7. knowom

    knowom Limp Gawd

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    More cache and reduce power while outperforms SRAM...seems legit!
     
  8. omegatotal

    omegatotal Gawd

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    add in some higher risk of data loss or data retention leading to exploits.. is it really worth it?