Move Over Mram, Say Bye Bye Dram, It’s Time for Ultraram

erek

[H]F Junkie
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https://www.nature.com/articles/s41598-019-45370-1
Skim ahead to fig2 and read the small print.

What you got here is flash memory. Trapped charge over an FET's channel.
What's different and unusual is how this new barrier allows charges in and
out of the trap. But only when tunneling at very specific voltages. No more,
no less. Wouldn't worry about more. Cause once the barrier tunnels at 2.6V,
the floating gate should rise (or sink) to follow the control gate. Is tunneling
less wear than the old way of punching through with brute force?

I have no clue how this resonant tunneling works even after long reading.
Two barriers in a row can be more or less transparent than one, what???
And I thought Josephson Junctions were confusing. Quantum is nuts...
 
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Figure 3 shows write and erase cycles aren't exactly equal. Pushes
floating charge off center, till after 1000 cycles (if the chart weren't
truncated at 700 not to show it) 1 and 0 become indistinguishable.
I'm assuming straight line trends would continue in straight lines.
A differential measurement of two cells that drift together might
be distinguishable a few more cycles, but even that has an end.

Has to be some way of clamping one or both ends of this drift.
I don't see this as a difficult problem. If always drifts the same
way (drifting upward in figure), maybe a single clamping diode?
If adding a diode to the float wouldn't cause it to leak too much.
I'm assuming diodes wouldn't be allowed or we wouldn't need
all this tunneling or punching through insulation to begin with.
Or feedback from channel to terminate write/erase on target?
Might correct the problem while still letting floating junk float.

Figure4 already illustrates an alarming leaky retention problem.
Will need daily refresh if they can't figure how to fix this.
Hardly non-volatile, yet...
 
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Figure 3 shows write and erase cycles aren't exactly equal. Pushes
floating charge off center, till after 1000 cycles (if the chart weren't
truncated at 700 not to show it) 1 and 0 become indistinguishable.
I'm assuming straight line trends would continue in straight lines.
A differential measurement of two cells that drift together might
be distinguishable a few more cycles, but even that has an end.

Has to be some way of clamping one or both ends of this drift.
I don't see this as a difficult problem. If always drifts the same
way (drifting upward in figure), maybe a single clamping diode?
If adding a diode to the float wouldn't cause it to leak too much.
I'm assuming diodes wouldn't be allowed or we wouldn't need
all this tunneling or punching through insulation to begin with.
Or feedback from channel to terminate write/erase on target?
Might correct the problem while still letting floating junk float.

Figure4 already illustrates an alarming leaky retention problem.
Will need daily refresh if they can't figure how to fix this.
Hardly non-volatile, yet...
^ dude took the red pill
 
holy crap, I'm glad I didn't have a mouthful of coffee while I was reading the comments here....my monitor would have had a bath!:LOL:
 
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