At CES 2019, Intel previewed their upcoming "Lakefield" SoC. Unlike Intel's previous mobile designs, Lakefield uses Intel's Foveros 3D stacking technology to integrate various IPs and system memory into a diminutive 12mm x 12mm package, and mixes 4 10nm Atom cores with a single 10nm Sunny Cove core. Unfortunately, Intel didn't specify how, or if, all the logical blocks are separated at the time. My take from CES was that the small Atom Cores, the big Sunny Cove core, and the various I/O blocks would all share the same 10nm die, but the wording in Intel's latest promo video makes that assumption more ambiguous, and manufacturing different logical blocks on different processes like AMD does for their 7nm Epyc CPUs is certainly something Intel is capable of. Either way, Lakefield is likely a window into the future of Intel CPU designs, and I fully expect the chipmaker to eventually take the same "modular" approach in higher end end desktop and server CPUs. Thanks to cageymaru for the tip. Check out the "Lakefield" promo video here. This hybrid CPU architecture enables combining different pieces of IP that might have previously been discrete into a single product with a smaller motherboard footprint, which allows OEMs more flexibility for thin and light form factor design. Lakefield is expected to be in production this year.