I decided to take a look at my SPD Timings Tables to see if there was anything wrong because I have been unable to post with this RAM with SLI Enabled Memory enabled in the CMOS.
There is only one set of timings, of 0-5-5-15. Seems a bit odd to me, anyone confirm?
Both sticks are the same.
There is only one set of timings, of 0-5-5-15. Seems a bit odd to me, anyone confirm?
Both sticks are the same.