AT: Intel’s Manufacturing Roadmap from 2019 to 2029: Back Porting, 7nm, 5nm, 3nm, 2nm, and 1.4 nm

Snowdog

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Intel is setting up to allow back porting their designs to a previous larger and mature node. Note this is one aspect where they messed up at 14nm. They had NO plans to backport new designs, so when the stalled at 14nm, they also stalled at skylake refreshes. Of course Intel hasn't exactly hit their process roadmap targets in a while:


Intel’s Manufacturing Roadmap from 2019 to 2029: Back Porting, 7nm, 5nm, 3nm, 2nm, and 1.4 nm

One of the interesting disclosures here at the IEEE International Electron Devices Meeting (IEDM) has been around new and upcoming process node technologies. Almost every session so far this week has covered 7nm, 5nm, and 3nm processes (as the industry calls them). What we didn’t expect to see disclosed was an extended roadmap of Intel’s upcoming manufacturing processes.
They say a slide is worth 1000 words. Here’s 1000 words on Intel's future:

IntelRoadmapWM.jpg


Edit: Anandtech updated the article to reflect the sourcing of changes to the image:

Update: After some emailing back and forth, we can confirm that the slide that Intel's partner ASML presented at the IEDM conference is actually an altered version of what Intel presented for the September 2019 source. ASML added animations to the slide such that the bottom row of dates correspond to specific nodes, however at the time we didn't spot these animations (neither did it seem did the rest of the press). It should be noted that the correlation that ASML made to exact node names isn't so much a stretch of the imagination to piece together, however it has been requested that we also add the original Intel slide to provide context to what Intel is saying compared to what was presented by ASML. Some of the wording in the article has changed to reflect this. Our analysis is still relevant.

Original slide:
190916%20SPIE%20Photomask%20and%20EUVL%20Plenary%20-%20Phillips%20v23-VRL2%20distribute-page-019.jpg
 
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Chimpee

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Intel is setting up to allow back porting their designs to a previous larger and mature node. Note this is one aspect where they messed up at 14nm. They had NO plans to backport new designs, so when the stalled at 14nm, they also stalled at skylake refreshes. Of course Intel hasn't exactly hit their process roadmap targets in a while:


Intel’s Manufacturing Roadmap from 2019 to 2029: Back Porting, 7nm, 5nm, 3nm, 2nm, and 1.4 nm

One of the interesting disclosures here at the IEEE International Electron Devices Meeting (IEDM) has been around new and upcoming process node technologies. Almost every session so far this week has covered 7nm, 5nm, and 3nm processes (as the industry calls them). What we didn’t expect to see disclosed was an extended roadmap of Intel’s upcoming manufacturing processes.
They say a slide is worth 1000 words. Here’s 1000 words on Intel's future:

View attachment 206081
It is a much more cautious path for them given their 10nm failure. While I don't follow node developments that well but isn't electro migration will be a huge issue going below 5nm? If so, doesn't Intel time frame for 3nm and below seems optimistic?
 

OrangeKhrush

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No post yet on Plundervolt, the latest line of Intel exploits. I think those are more interesting than intels product line up for the forseeable future.

Anyways Intel will play the only card it has left, throw huge money at a problem and hope it solves it.
 
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extide

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I mean, the only thing you can say about this is, "We'll see." -- but maybe just maybe Intel got the message about slacking off and is actually going to put their nose to the grindstone here for a bit. Maybe.
 

bigdogchris

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Back to a 2 year cadence for process size? Hopefully this means the pencil pusher that came up with the idea of dropping tick-tock to optimize profit was overridden, for good.
 
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Derfnofred

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While I don't follow node developments that well but isn't electro migration will be a huge issue going below 5nm?
You make sure you don't need long metal lines for these ultra small feature levels, so you use heavier, higher resistance metals, eg. Ta, W, Cr that do not suffer from electromigration anywhere near as bad, then switch over to Cu BEOL. At least that's what I remember, been out of processing for a while.
 

Grimlaking

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It's just a chart totally meant to give intel fans a chance to say. "You wait and see AMD."

And I don't think AMD will wait and see for one damn thing. They are already looking to 5nm and have 7nm processes in channel.

And I'm sure as soon as a good method for 3nm and below becomes available they will take it.

AMD has never sat on their laurels when it comes to technology advacement the way Intel did.

My hopes is that both manufacturers push the envelope. And it would be pretty awesome to see a 3rd player come into the market again and leapfrog them both technologically.
 

Snowdog

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Yet they didn't rest on their laurels they were attempting something better and greater and hit a stumbling block. Difference.
Bulldozer was 2011, they stayed with that for 6 years.

Plus it isn't like Intel had no stumbling blocks. 10nm transition failure delayed not only the process, but the next gen architecture that goes with it.
 

IdiotInCharge

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but the next gen architecture that goes with it.
That's what really killed them: Kaby Lake was the first 'stop gap', and we're looking at three generations after now. Had they ported their new cores and GPU back to 14nm then, Ryzen's release would have looked much more like Bulldozer. They'd have also made their customers much more happy all around as they'd have capacity as well as security covered.
 

DeathFromBelow

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Bulldozer was 2011, they stayed with that for 6 years.
Bulldozer looks pretty damn good in light of the huge security issues that Intel created to maintain their apparent IPC advantage.

AMD admitted right up front that they wanted better, and they got to work squeezing real IPC gains out of the architecture for Piledriver and their APUs and started work on Ryzen. Intel's response to the process and security issues has been Moore and Moore marketing bullshit.
 

Darth Ender

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The only way you can drop die size into 5nm and below is if the density doesn't increase or we make due with much lower wattage (little to no performance increase, just power usage decrease).

We already have trouble cooling 7nm chips down. We'd need a new way to cool the cpu's to drop lower without reducing power output. i dont see any part of the roadmap that deals with that, suggesting a solution already exists or that it's based on hopes and dreams.

i think it's latter.
 

Grimlaking

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The only way you can drop die size into 5nm and below is if the density doesn't increase or we make due with much lower wattage (little to no performance increase, just power usage decrease).

We already have trouble cooling 7nm chips down. We'd need a new way to cool the cpu's to drop lower without reducing power output. i dont see any part of the roadmap that deals with that, suggesting a solution already exists or that it's based on hopes and dreams.

i think it's latter.
There is a solution for this but it means more space. You design cookie bar sockets and CPU's with gaps to allow for colling channels to slide through the CPU. You would need bushings to allow for direct contact to the heat transport surfaces. Then an active cooler like a water block or fan cooled blades to assist with the active cooling. Basically increase contact area and design the CPU to have direct die contact in shapes we don't normally do today.
 
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IdiotInCharge

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We already have trouble cooling 7nm chips down. We'd need a new way to cool the cpu's to drop lower without reducing power output. i dont see any part of the roadmap that deals with that, suggesting a solution already exists or that it's based on hopes and dreams.

i think it's latter.
You hypothesize about cooling on the [H], and think it can't be done better?

Lol.
 

extide

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The only way you can drop die size into 5nm and below is if the density doesn't increase or we make due with much lower wattage (little to no performance increase, just power usage decrease).

We already have trouble cooling 7nm chips down. We'd need a new way to cool the cpu's to drop lower without reducing power output. i dont see any part of the roadmap that deals with that, suggesting a solution already exists or that it's based on hopes and dreams.

i think it's latter.
Ehh, the Watts per sq mm of silicon has actually stayed pretty consistent over the past 10-15 years -- I mean overall die sizes are in the 200-400 sq mm range for cpu's in the 95-130w TDP range. Just more transistors, but less power for each one.
 

Darth Ender

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Novel cooling techniques that require new layouts or materials for die design and hsf contact are not incremental updates that happen within the year.

Pretty sure we would have to hear about these and see them trickle into special built parts first and I haven't heard of any of these unconventional cooling methods being used successfully
 

Darth Ender

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Ehh, the Watts per sq mm of silicon has actually stayed pretty consistent over the past 10-15 years -- I mean overall die sizes are in the 200-400 sq mm range for cpu's in the 95-130w TDP range. Just more transistors, but less power for each one.
Wrong. Watts per cpu has been roughly the same but the die size has shrunk significantly. The move to 7nm has made that obvious
 

serpretetsky

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Wrong. Watts per cpu has been roughly the same but the die size has shrunk significantly. The move to 7nm has made that obvious
Just googled some numbers, let me know if I missed anything.
P4 williamette 146 mm^2
Q6600 286 mm^2 (2 dies i think?)
i7 920 263 mm^2
i7 4770k 177 mm^2
i7 7700k 122 mm^2
i7 8700k 151 mm^2
i7 9700k ~170mm^2

Seems like die size hovers around 200mm^2 size. Of course the "extreme" versions go up to 300mm^2 400mm^2.

edit1: added i7 7700k
 
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DTN107

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Another year, another new road map.

Whats new Intel?
 
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Snowdog

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Just googled some numbers, let me know if I missed anything.
P4 williamette 146 mm^2
Q6600 286 mm^2 (2 dies i think?)
i7 920 263 mm^2
i7 4770k 177 mm^2
i7 8700k 151 mm^2
i7 9700k ~170mm^2

Seems like die size hovers around 200mm^2 size. Of course the "extreme" versions go up to 300mm^2 400mm^2.
Yeah, you missed all the smallest dies in the middle (5700/6700/7700K). If you are making size conclusions, and you leave out all the smallest dies, your conclusion is likely off.
 

Darth Ender

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what's also being done is ignoring the fact that core count has gone up which is what is keeping the largest around the same size as previous generations. Regardless of which you look at in terms of core count, their density has increased.

The point being that heat is generated by the cores and has to travel out to keep the cpu cool. The same materials is being used to do that heat transport now since the beginning of cpu's basically. So heat has to travel much further now than before to keep the cpu cool. This leads to temperature increases and spikes that impact the cpu as die size tech decreases. Copper and aluminum and silicone aren't going to get any better at moving heat. To keep 5nm and beyond cool, we're going to have to start seeing some novel techniques used to move that heat out ....which could mean replacing SI as the semiconductor or things like nano-tubes embedded in the cpu to get the heat spread out faster. Things that just wont be implemented over the course of a year in mainstream cpu's. We'd first have to start seeing these appear in custom processors to prove their efficacy and outside of labs with just minor proof of concepts, I haven't heard of any yet. So as far as I see, 5nm and beyond would hit a performance wall limited by thermal runaway.

So I think the roadmap is bs (who would trust an intel roadmap on die processes anyway?). In any case, I doubt either amd or intel will be ok with letting heat win. So i think we'll start seeing/hearing about these novel cooling methods soon. But i think 5nm is around 2022, and exponentially longer intervals to get to the next die drop.
 

serpretetsky

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Yeah, you missed all the smallest dies in the middle (5700/6700/7700K). If you are making size conclusions, and you leave out all the smallest dies, your conclusion is likely off.
Heh, was just randomly choosing ones. I added the i7 7700k, for some reason having trouble finding the other two.
 

serpretetsky

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what's also being done is ignoring the fact that core count has gone up which is what is keeping the largest around the same size as previous generations. Regardless of which you look at in terms of core count, their density has increased.
Well, the argument being made was that average die size has not gone down that much, and power consumption stills hovers under 100 watts. So the thermal watts/surface area has not increased. Why should core counts affect the cooling solution?

So heat has to travel much further now than before to keep the cpu cool.
what do you mean? What added distance are you factoring in where the heat has to travel further?
 

sabrewolf732

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It's just a chart totally meant to give intel fans a chance to say. "You wait and see AMD."

And I don't think AMD will wait and see for one damn thing. They are already looking to 5nm and have 7nm processes in channel.

And I'm sure as soon as a good method for 3nm and below becomes available they will take it.

AMD has never sat on their laurels when it comes to technology advacement the way Intel did.

My hopes is that both manufacturers push the envelope. And it would be pretty awesome to see a 3rd player come into the market again and leapfrog them both technologically.
AMD has never sat on their laurels?

Hahahaha *snort*

Did you miss the entire phenom (phenom II was decent) and bulldozer period of time?
 

Geforcepat

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Lol:ROFLMAO:@ any long term roadmap from intel. And i don't understand the comments that intel wont be around in 10 years. i'm assuming they're joking. If not they're knuckle heads to put it nicely.
 

Mega6

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AMD has never sat on their laurels?

Hahahaha *snort*

Did you miss the entire phenom (phenom II was decent) and bulldozer period of time?
Bulldozer (2011) was the followup to Phenom II (2008). Just because AMD's Bulldozer architecture was not well received is not indicative that AMD did nothing. Bulldozer was a "daring" design that tried to predict where software needs were going.

Not very analogous to Intel's repeated quad core (2) releases on same tweaked core redundancy that we have had since 2006. That is purposeful stagnation. At least AMD tried something different to try and revolutionize the field. Intel really has nothing to compare in terms of effort or "new" since 2006.

It's pretty clear what company has sat on their ass. The one that got left behind,
 
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