Asus P8P67 Pro PCIe lanes - Did I get it right?

twsmit

n00b
Joined
Jan 30, 2006
Messages
46
I'm trying to get a handle on the allocation of PCIe channels on my P8P67 Pro. Piecing together info from a few reviews and the manual I think I have figured it out. Does this look right? Hope this helps others.


The board supports 3 different modes for the PCIe x4 slot. (Auto / X4 Mode / X1 Mode). With SLI/Crossfire the top two PCIe x16 slots run at x8. Otherwise the second x16 slot is turned off. The third x16 slot is always electrically x1 or x4. Also to note the CPU powers the graphics card slots so those PCIe lanes do not pass through the chipset.

P67 PCH - 8 PCI 2.0 lanes.

List of components:
  • PCIe x1_1
  • PCIe x1_2
  • PCIe x16_3 (electrical x1/x4)
  • ASM1085 x1 PCIe to PCI bridge
    • VIA VT6308P PCI Firewire controller
    • PCI slot 1
    • PCI slot 2
  • Marvell 9120 x1 PCIe SATA 6Gb/s
  • JMicron JMB362 x1 PCIe SATA 3 Gb/s
  • NEC x1 PCIe USB 3.0 (Back port)
  • NEC x1 PCIe USB 3.0 (Onboard port)
  • Intel 82579 Gigabit LAN Physical Layer (PHY) x1 PCIe
Auto Mode:
Enabled
  • PCIe x1_1
  • PCIe x16_3 (electrical x1)
  • ASM1085 x1 PCIe to PCI bridge
    • VIA VT6308P PCI Firewire controller
    • PCI slot 1
    • PCI slot 2
  • Marvell 9120 x1 PCIe SATA 6Gb/s
  • JMicron JMB362 x1 PCIe SATA 3 Gb/s
  • NEC x1 PCIe USB 3.0 (Back port)
  • NEC x1 PCIe USB 3.0 (Onboard port)
  • Intel 82579 Gigabit LAN Physical Layer (PHY) x1 PCIe
Disabled
  • PCIe x1_1
x4 Mode:
Enabled
  • PCIe x16_3 (electrical x4)
  • ASM1085 x1 PCIe to PCI bridge
    • VIA VT6308P PCI Firewire controller
    • PCI slot 1
    • PCI slot 2
  • Marvell 9120 x1 PCIe SATA 6Gb/s
  • NEC x1 PCIe USB 3.0 (Back port)
  • NEC x1 PCIe USB 3.0 (Onboard port)
  • Intel 82579 Gigabit LAN Physical Layer (PHY) x1 PCIe
Disabled
  • PCIe x1_1
  • PCIe x1_2
  • NEC x1 PCIe USB 3.0 (Onboard port)
  • JMicron JMB362 x1 PCIe SATA 3 Gb/s
x1 Mode:
Enabled
  • PCIe x1_1
  • PCIe x1_2
  • PCIe x16_3 (electrical x1)
  • ASM1085 x1 PCIe to PCI bridge
    • VIA VT6308P PCI Firewire controller
    • PCI slot 1
    • PCI slot 2
  • Marvell 9120 x1 PCIe SATA 6Gb/s
  • JMicron JMB362 x1 PCIe SATA 3 Gb/s
  • NEC x1 PCIe USB 3.0 (Back port)
  • Intel 82579 Gigabit LAN Physical Layer (PHY) x1 PCIe
Disabled
  • NEC x1 PCIe USB 3.0 (Onboard port)
 
Joined
Nov 15, 2006
Messages
655
This is such a fantastic breakdown of how the PCIe lanes are configured on the board, would you be so kind as to take the time to construct something similar for the Vanilla P8P67 board? I know there are some differences and I would love to see the Vanilla board listed like the above Pro. I would really appreciate any time or effort put into this. Thanks.
 
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