Ask AMD about Bulldozer

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FrgMstr

FrgMstr

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AMD approached me and expressed a desire to reach out to the members of the enthusiast hardware community about Bulldozer. We discussed a couple of approaches on how to do this and we decided that we would host this HardForum thread for our readers to post their questions in. AMD will then have the questions in hand and will internally deliver the questions to the persons at AMD that should best answer those. Once our questions are answered by AMD, we will construct an interview article and publish it for you to read. Surely we will discuss that as well.

This forum thread is for QUESTIONS ABOUT DESKTOP BULLDOZER / ZAMBEZI ONLY. ONE CLEAR AND CONCISE QUESTION PER POST.

These questions should be constructed using proper grammar, spelling, and most of all, etiquette.

Questions not following the above outlined formatting will be deleted and your account will disabled till the interview is published.

So please think before you submit your question, and please take this opportunity seriously. We have this chance to subvert all of the rumor mills and get our information straight from the AMD source(s). I think our community can embrace this event and get the answers it wants and the answers I truly think it deserves.

Should you be unaware of the Bulldozer launch, you can read our review here.
 
Are the engineers/programmers at AMD working on an BD optimizer? Something like the old Dual core optimizer drivers for Win xp?
 
Why was the L1 cache size reduced going from Phenom II to Bulldozer?
 
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Earlier in development, it was stated that Bulldozer would see an IPC improvement over Thuban; had this been the case, even with the chip failing to hit the intended clocks the released product would be in a better situation. What flaws in the design or manufacturing process would you attribute the failure to reach this goal to, and is it expected that they'll be remedied in later Bulldozer variants?
 
There have been concerns about the seemingly high BD power usage. Do you have engineers working on curbing BD's power usage?
 
Is there a drastically different design philosophy/process between the GPU division and the CPU division that might explain the success of one vs what seems to be the failings of the other? There's been 3 great GPU series in a row (4k, 5k, 6k) with 3 lackluster CPU families (Phenom, Phenom II, Bulldozer) during this time period, or is the design process between the two product lines too different.
 
From the many reviews I've read Bulldozer power usage ramps up very quickly when overclocking. This is obviously a concern from an overclocker/enthusiast perspective for both heat produced by the CPU and power supply requirements. Does AMD have any shorter term plans, such as a newer Bulldozer revision to address the power consumption issue, and if so can you briefly elaborate on those plans?
 
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When do they anticipate addressing the thermal issues associated with the current silicon?
 
What improvements are in-store for the next generation of 'bulldozer' architecture?
 
Will unlocking of cores be allowed, similar to the x3 to x4 unlock?
 
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Why are the integer operation benchmarks so low compared to even previous AMD 4 cores? Is there some sort of bug or cache thrashing that is preventing all 8 integer cores on the 81xx series chips from running at maximum performance.
 
Since the FX has not enjoyed the most positive introduction despite competitive pricing, why not simply allow enthusiasts to put a second FX processor in a system?

A dual FX8150 would surely be competitive with the impending Sandybridge-E platform in both price and performance.
 
I think the number one reason enthusiast community has not fully embraced Bulldozer architecture is due to significantly higher power consumption as compared even to the old generation: Stars or Thuban, per computational work done. We shouldn't overlook the fact that AMD did a great job on the power gating and the idle power consumption, but when it comes to the power consumption under load, things are not so great.

We feel that power consumption and heat generation is one of the primary reasons for Bulldozer's somewhat lower than expected overclocking capability. With a longer pipeline and significantly lower IPC, higher clock is needed to achieve the same performance levels as competing products, however power consumption (and TDP) seems to be the limiting factor.

Many in the community feel that the reason for this is a (uncharacteristically for AMD) large transistor budget used to produce this processor. Reports state ~2 billion transistors of which some 800 million are used in uncore alone.

Is AMD working to optimize the design, in order to lower the transistor count, and therefore lower the power consumption as well as improve the overclocking capabilities of the CPU? Can you get into detail of what's being done to turn Bulldozer architecture into a more competitive solution?
 
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The bug in shogun 2 where some people are getting bsods is that form a soft where bug that can be fixed in a update or is it like whit the old P1 where the fix slowed the chip down. Also when will there be beter stock of 8150s? They seam hard to find right now.
 
Will you consider repricing the FX-4100 as it seems to have a difficult time competing with FM1 Llano Quad Cores including the Athlon II X4 631? There seem to be little compelling reason to pick the an AM3+ setup with the FX-4100 over similarly priced FM1 setups right now.
 
Given reports that the Athlon II X4 631 clocks extremely well when freed of the gpu constraint, has AMD considered a dual package Stars based CPU (a la Magny Cours) to provide an 8 core stopgap while Bulldozer issues are resolved? The net transistor count of 8 stars cores would seem significantly lower than the Bulldozer allotment, pointing to the possibility of reduced cost in addition to higher performance.
 
Since I believe the high power consumption issue will almost certainly be addressed, when can we expect to see a new revision that will bring power consumption levels down, like what occurred between Phenom and Phenom II?
 
With Zambezi reportedly containing approximately 2 billion transistors, why has the transistor count risen so much from the previous generation Thuban processors? It has been said that the module approach to sharing some hardware between two cores should reduce the amount of logic needed per core. Even with two additional cores over Thuban it seems like the chip should not have grown much. Excluding caches, what are some of the structures that are consuming the most transistors in the design?
 
why did they release a product knowing very well that it will underperform?
we could've wait a bit longer for a decent product...anyway i hope all turns out good
 
I see that the HTT was increased for the 8120 and 8150 to 2200mhz in comparison to a stock 1090t and FX-6100 running at 2000mhz. Has AMD considered shipping CPUs with a higher Hyper-Transport? For example I have my 1090t's Hypertransport running at 3000Mhz, and have noticed a performance increase. My Deneb based Phenoms seems to be happy at 2600Mhz, which is what I would consider Ideal as a shipping Hypertransport.
 
I noticed a lack of micro ATX 900 series chipset motherboards. Is this because of board maker decisions, or AMD barring them from doing so? If it's the latter, why?
 
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Do you see your selves reclaiming the performance crown from Intel in the future?
 
Was Bulldozer's architecture in any way influenced by the direction AMD is taking with GPU's?
 
Question: Is AMD working with the Linux kernel contributors to optimize FX-4/6/8xxx thread scheduling in a future kernel where it will show significant improvement over current performance?
 
Even though AMD has already stated Bulldozer will not have unlockable cores as previous processors have had. Will that be an option in the future for Bulldozer; is AMD going to keep that stance for future architectures, such as Piledriver?


Edit: (If this is incorrect, I apologize. For some reason I have it in my mind I read that they are taking that stance.)
Edit2: My question stands. I found the article.
 
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When AMD was optimizing/mapping out performance for the FX-****, were they testing on unix/bsd/linux kernels since the architecture will be used in opteron 4xxx/6xxx parts (which are higher profit) or were they testing/optimizing based on windows7/server or both?
 
My question:

Earlier this year AMD stated that it will be supporting CoreBoot on all of it's processors: http://blogs.amd.com/work/2011/05/05/an-update-on-coreboot/

Is this approach to CoreBoot reflected in the requirements for Bulldozer / Zambezi motherboard support; is it now a requirement for motherboard vendors that Socket AM3+ / FM1 motherboards have to support a CoreBoot payload?

Part of the same question, it's been murmured about that any existing Socket AM3 motherboard that can run CoreBoot v4 should also be capable of driving a Bulldozer processor. Can AMD comment on this particular rumor?
 
Based on various reviews and benchmarks, the price vs performance of BD seems sub par relative to current Intel SB offerings.

Can you explain you competitive positioning relative to Intel?
 
Since Bulldozer has already been released and is in mass production is there any word on why Kumodo was canceled and replaced with Vishera? Secondly does this mean that Amd plans to try and get these processors out faster than expected currently set for release 03 2012?

Being a Bulldozer user for well over 2 weeks now, is there any plan to work with oems and software developers to improve performance in current applications and games? To take advantage of new instruction sets, and perhaps a windows 7 scheduler improvement.

Are their any plans to release higher binned products which are faster than than the 8150 in the near distant future?

Will there be any pricing reforms on Bulldozer products to reflect current performance figures against competitor products?
 
FX Processors have taken the many core approach, presumably betting that multithreaded code will become more prevalent in the future. We have also seen that multithreading has various effects when used on the FX line of processors. Some perform very well, but some implementations of supposedly very good multithreaded coding (like that in Civilization V) show surprisingly weak results on FX chips.

With this in mind, and seeing how AMD has a huge stake in multithreaded code becoming more prevalent, is anything being done from AMD's side to a.) promote the development of more true multithreaded code and b.) give guidance to developers on how to approach multithreaded code to give as good results as possible?

I hope this question isn't too long.
 
Your own estimates for future chips forecasts a 10-15% increase annually, could we assume that these increases in performance will be attributed to maturation of the silicon and a subsequent bump in clock speed?

If not, are you considering perhaps restructuring the architecture of future chips in favor of something that will favor IPC more than core count or CMT? In other words, improving the single core/thread performance
 
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Since Intel seems to be one die reduction ahead of AMD lately, would it be possible for AMD to concentrate on the same size or smaller than Intel in an attempt to catch up?
 
Your future road maps indicate you expect to receive approximately 15% increasing IPC with each new generation of the Bulldozer architecture. There is talk that Bulldozer has some bugs that were not immediately known to AMD when these core designs were being laid out such as cache trashing and scheduler hiccups. Can we assume that this 15% increase in IPC is still a accurate representation of future performance in the Bulldozer architecture, or can more immediate changes be made near term to fix issues that were not immediately identifiable in the past, and therefore bring the first few future iterations up in expected IPC compared to what was originally forecast?
 
It has been stated that Bulldozer will see improvements in performance with the Windows 8 scheduler. Would you elaborate?
 
Like most of us here, I would like to see AMD succeed. As such, I do have a couple of questions for AMD. In order to stick to the rules I am asking one question per post:

Is AMD able to improve IPC performance per core in the current Bulldozer design? If so, by how much and in what time frame?
 
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Would it be possible to improve per module performance by doing the following:

  • shrink the L2 cache size in order to have transistors available to implement two full blown Integer Cores per module instead of sharing resources
  • increase IPC performance per Integer Core dramatically and decrease total CPU clock speed in order to decrease power draw
Thank you
 
Multithreading is important, but the enthusiast community would be fine for now with a CPU that executes less threads, but can process more instructions per clock. Is it possible to bring such a CPU to the market by either improving on an older design or on the current Bulldozer design?
 
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Already repeatedly mentioned but +1; As a gamer I really care about IPC (and of course clockspeed/overclock potential) so commentary on future improvements in this area is much appreciated.
 
Until the performance related issues with the Bulldozer architecture are resolved, would it be possible to bring to market a Phenom II X8 CPU with 8 cores? I imagine that this would be a die shrunk (to 32nm) Phenom II X6 with two additional cores. Many of us would embrace such a product.

Thank you.
 
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