.05v, 1050mV to 1100mV, 4.761905% Why did they start limiting the max voltage to 1070mV then?
If the silicon quality and architecture is efficient enough to hit their desired boost clocks with the lower voltage why not lower it? I think this has far more to do with process maturity than it does catastrophic voltage. If 1.1 kills it, -.07 is gonna kill it a short while later