The i920 I bought in 2008 and from which i'm typing this at the moment is probably the best CPU I've ever bought. It just hums along like a Caterpillar bulldozer ( pun intended ) through everything I throw at it.
I still have a P4 540E ( that's Prescott based ) on socket 925XE with dual...
Back in the old school ( like 1995-2000 ) OC was done to get more performance for $, CPUs were slow, the new stuff really expensive. Nowadays, the difference between a $100 and a $999 in daily tasks is more or less impossible to tell if all you do is surf the web, office and a few movies.
OC...
Apparently, due to the power saving features in Win7, Winrar is taking a hit since it can't awaken HT logical cores :
http://hwbot.org/forum/showthread.php?p=138245
The difference is staggering for HT enabled CPUs and completely trounce the FX cpus...
?!?! That's set in stone. That will be fixed with a new uarch, 4-5 years from now. Until then, CMT is here to stay.
That's out of the question on any sensible time horizon. And it's not about hand optimization. You need experienced people for that. Probably machines do it better than...
Well, naive wouldn't be a proper word, but is the closest I can think off. In a perfect world, what you'd say would work. In this real world however, anyone who operates a business knows that competition can be hard sometimes.
I don't hold Intel's practices as significantly damaging...
And how much did Intel gain with D0 in stock frequency ? 200MHz ? You see, OC ability doesn't translate into equivalent headroom for new bins.
Thirdly, D0 did nothing for IPC. Everybody is hoping BD will somehow magically get an IPC increase with a new stepping.
Fourthly, BD gaining...
People have short memories and believe wonders will happen...Wait for Win8 in late 2012 or 2013 !:p
Man..do yourself a favour and stop engaging in wishfull thinking. A new stepping can bring you 1-2% from tweaks, improve power consumption and yield better. But it won't fix a massive...
It is.
Translation : AMD was able to reproduce the situation and is working on a fix.
http://www.hardware.fr/articles/842-22/jeux-3d-total-war-shogun-2-starcraft-ii-anno-1404.html
Other sites have reported the same issue and contacted AMD...
I feel the need to ask this : what exactly are you trying to do with all these changes ? Get the CPU to work with all games ?
There is a bug in the CPU which is triggered by some games like Shogun. You can't fix that, it's up to AMD to fix either through microcode update or a new revision. I...
With double the core count...:rolleyes:
What exactly did Cray know of BD performance in 2009 except projections ? AMD estimated given level of performance. Cray worked with that.
BD ended up below expectations and AMD had to revise its performance projections over MC.
Feel free to...
All this Cray talk is stupid.
Cray will mostly likely abandon AMD after the BD debacle. They got shafted once, with Barcelona and now they are down the sink again.
Cray wins contracts several years before they are implemented. The systems you see were quoted in 2008-2009. Back then, BD...
BD crashing in games is a bug in the CPU, it has nothing to do with SW. AMD is investigating the issue, was able to recreate it ( Shogun triggers it all of the time causing the CPU to deadlock ). Hopefully the problem will be solved through a microcode update ( either in the form of a new BIOS...
If you want to give away performance and pay extra for that privilege, by all means, go for it.
I have a 920 too. The only think I'm looking at is the 2011 SB-Es. The low end model looks tempting. Going from the fastest platform money can buy, 1366, why settle for less in the future ? ;)
That is impossible; repeat after me, IMPOSSIBLE.
2x4 core Westmere vs. a single 8 core FX8150.
8 full fledged Westmere cores vs. 8 half width FX cores.
INT => 24 ALUs for Westmere vs. 16 for FX.
FP => 16 FPU 128bit units vs. 8 128bit units ( same throughput as 16 if you use FMA )...
How many transistors are in BD ( separated in logic, L3, system, I/O ) ? These details are usually published in ISSC or Hot Chips papers, shouldn't be classified.
Indeed.
AMD payed like $6Billion for ATI and now the combined value of the company is $3.2B while the GPU division IIRC is hardly at break even level over its entire existence. When will the GPU division cover the ATI investment ? 2099 ?
Blame the nameless engineers ?! My God, that's low.
AMD engineers always claimed BD wasn't designed to improve IPC.
He's Director Of Product Marketing. Rest assured that he receives a daily report on how every product under him is doing. He didn't meet the engineers in the cafeteria and...
From where is this ideea that the 6 cores are 8 cores with 2 disabled ?
Since Xeons are pretty large volume, I wouldn't be suprised to have 2 dies : an 8 core one and a 6 core one ( that also gives 4 with 2 cores disabled ).
The volume is in the 6 core parts. It doesn't make sense (looking...
AMD declared they expect 3-5% from uarch tweaks ( normal for a new stepping ) and 10% from more frequency ( process maturing ).
How can you "believe" in something that not even the manufacturer commits to ?
The last thing AMD needs is to do things in a hurry. K10 failed because AMD did it...
At 45nm, a new tape out cost was $20-50 million depending on complexity. I believe BD falls firmly in the later and at 32nm it's even more than that.
AMD server CPU revenues are around $85m / Q. What's another respin or two ?
Complete jerk ? Paul can't stand fools, he's part of the old school and after 10-15 years on the interweb, you kinda of lose patience.
His discussions on RWT with Chuck, Bill Todd, Linus Torvalds were fascinating. His wit and sharp tongue added to an incendiary mix of exquisite technical...
QFT.
I'd add another post from AT poster, just to reinforce this view :
http://forums.anandtech.com/showpost.php?p=32424055&postcount=148
Paul Demone trashes JF's "explanation" and for good reason.
http://investorshub.advfn.com/boards/read_msg.aspx?message_id=68029856
To come now...
How ? They've just released the damn thing. It will take years until something new is prepared. Next gen is supposed to have 3% IPC and like 10% frequency improvement.
The story unfolded
-the uarch was simplified, less execution INT units, FPU shared, longer instruction latencies , increase cache latencies, loosing 5% IPC for 20% more frequency ( this was the plan )
-the implementation sucked because if was done with synthetised tools ( 20% larger blocks and...