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I guess Ill need to do a deeper dig into the chipset spec then and see if this is possible. Thanks for the input so far on this everybody.

I hadn't considered that aspect and the cost difference is little to none for many SED vs non drives. It would allow for the use of that option later without a huge cost replacing noncompliant drives.

@toast0 For the surprise insertion you and I are on the same page as far as memory structures. From what I can tell with the PLX chips they do the work of bifurcating a connector when a motherboard isn't equipped to do so. I suspect if you did use a PLX chip it would need to manage the hot...

PCIe does indeed have hot insertion implementation. Its actually called "Surprise Insertion/Removal" and most of the standard comes down to properly sequencing powerup and other electrical considerations. The one hard limit I've read of is that the PCIe bus wasn't at first designed for this so a...

No mining rigs here. I work at a place that performs data destruction for a humbling number of drives as part of asset disposal\reuse. As more media formats have been created its made the job more complex and has impacted scalability. Long gone are the days where you can simply throw together a...

I've been doing extensive research for a work related project. Its a niche application that needs a boatload of PCIe lanes. Between using bridge\switch chips or a motherboard with PCIe bifurcation, the bifurcation route seems to be not only far cheaper but also more reliable providing the...