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Hello! I have a question (already contacted Areca support, but just hours ago, so no reply yet) about the Areca Ethernet port and also the in-band management. So, I'm preparing a new workstation with direct-attached storage using this brand-new ARC-1883ix-12 here. Currently, I only have two...

Hmm, but can a DDR3 data pin really be missing? I would've thought they need all 64 of them (hence, making it a 64-bit data interface in my laymans way of thinking). Maybe the socket is actually upside down on the board?! Uhh.. I need to verify that. Edit: Ahaha, it's upside down.. Bah! All...

Sorry for the double post.. I'm a bit lost. At first I thought the traces just aren't there like Dan suggested, as I could not get a connection between DDR2_ECC[3] in the LGA1366 and CB[3] on the DIMM socket. To verify it, I tried to connect DQ[0] on the DIMM (pin #3) and DDR2_DQ[0] in the...

I was thinking it'd be best to remove the processor as well as all RAM and power from the system, and then measure from open socket to socket. If the DIMM sockets are too narrow to use, I can still go to the back side of the board.

I haven't done the measurements yet. You're probably right, but I still wanna check it, just to make sure. Maybe tomorrow or some other day this week. In any case, I've made a few preparations, so these are the ECC pins, in case anyone ever needs that: ECC Pins per channel on a LGA1366...

It came to my mind just 10 seconds ago, so I RACED back here to write just that before anyone notices, so that I won't look stupid. I failed.. ;) So that's the next step then!

It doesn't matter. If any result is reached, and it turns out to corrupt data rather than protecting it, all I can lose is data on a Debian testing installation that I'm gonna wipe anyway. But it's not like this is going anywhere. I believe I'm stuck as it stands (which is why I posted here, as...

Ah, I see. This is not exactly a "mission-critical" machine for me, it's just my personal workstation. Actually a second one, that is meant as a replacement in case something fails in the primary machine (same hardware). Cost is not a major issue for me, not at the level you describe at least...

Hm, I didn't expect so much, um.. What is the correct English word.. "Hostility"? Not quite, but something in that area. "Resistance" seems to weak a word. Patching Microcodes into a BIOS is really nothing big at all. Linux and BSD UNIX kernels patch it in RAM when booting anyway, at runtime (I...

I've already fixed the microcode issue, that part is very easy using AMI's AMIBCP tool. You can dump microcodes from a donor BIOS from boards which support the Xeons (like the EVGA Classified SR-2 or any Supermicro or whatever), patch them into the target BIOS, flash that in, problem solved...

Hey, I just registered here for this thread! I am trying to do something similar with a Xeon X5690 on an ASUS P6T Deluxe (X58 Tylersburg). I do know already that my BIOS is likely missing the code necessary to "initialize" ECC. On top of that, the traces on the board may be missing too...