Ryzen 3000 CCX and Core Layout

Thought this would be helpful to some as this discussion has been going on in the threads.


"The entire, to this point, mainstream Ryzen 3000 Series family has been announced. But there still seems to be some confusion floating around in comment sections regarding the layout of the cores on the chiplets as well as the CCX structure as well. We’re going to try to break this down is a very simple and a high-level overview of what is going is going on under the IHS and within the chiplets of the new Ryzen 3000 Series CPUs. "


https://wccftech.com/ryzen-3000-series-ccx-and-core-layout-quick-guide/

that website is blocked at my work. Can someone post a summary of the chiplet core counts and layout?

16 core has 2 chiplets
12 core has 2 with 4 cores disabled
8 core has 1 chiplet
6 core has 1 with 2 cores disabled

There are 2 CCX per chiplet, each having 4 cores. It says any of the cores can be the disabled cores.

Each chiplet has 2 CCXs

One core from each CCX will be disabled in the 12C

Here is the 12 core and 8 core.

And the CCX means the 8 cores in 1 chiplet is actually 2 quad core cpus, just on the same piece of silicon, interconnected, right?

So the numa is likely 8 threads per numa node. Haven't looked into the numa node size on the larger Intels yet to verify, but pretty sure those have been double that. Would factor into core to core communication speed/latency as far as [H] readers would be concerned. I think that inter-core layout and latencies being mishandled by the OS was what the guy found a few months ago... where windows wasn't scheduling the ryzen cpu quite right in certain applications.

Dermen said:

16 core has 2 chiplets
12 core has 2 with 4 cores disabled
8 core has 1 chiplet
6 core has 1 with 2 cores disabled

There are 2 CCX per chiplet, each having 4 cores. It says any of the cores can be the disabled cores.

Click to expand...

Sounds exactly the same as Ryzen v1.0, but wit improved interconnect.

This makes me think that the first revision of Zen 2 APU (4000-series) will have the same 4 cores as the current chips? I was hoping for 8 core native, so they could eventually bump-up the core count, but I guess 7nm isn't quite dense enough?

Guess we have to wait for Zen 3 on 5nm before we double the size of each chiplet?

defaultluser said:

I was hoping for 8 core native, so they could eventually bump-up the core count, but I guess 7nm isn't quite dense enough?

Click to expand...

It may be that AMD is going to do this second, similar to Intel's old 'tick tock' cadence that broke with their 10nm process.

Shrink Ryzen first, then update the architecture. From what we can tell the cores themselves haven't changed, AMD has just gotten the rest of the part out of the way.

IdiotInCharge said:

It may be that AMD is going to do this second, similar to Intel's old 'tick tock' cadence that broke with their 10nm process.

Shrink Ryzen first, then update the architecture. From what we can tell the cores themselves haven't changed, AMD has just gotten the rest of the part out of the way.

Click to expand...

That would make a bit of sense. They "unbottled" Zen thanks to the break from GF's 14nm/12nm process. They found that with a little front end rework, and moving the IMC to the I/O chip, they could give the cores more memory bandwidth.


It has really gone u mentioned, but that massive 36MB L3 (on the 8 cores) and the insanely massive 70MB on the 12 core part is super tasty. That will allow the CPU to stay out of main memory more often, and help mask latency when it needs to access DRAM.

I've decided I'm getting the 8c/16t, and then possibly going x570 with thr Zen2+ refresh to the 12 or 16 core. I'm going to do my best to see how far 780mm of rad space will take the 8 core. Hoping for 4.5-4.7Ghz AC OC.