Intel's 12 to 18 Core Skylake-X CPUs Delidded

Megalith

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Overclocking guru Der8auer has delidded some early Skylake-X samples: images show a die size much larger than existing 10-core or lower X299 processors. The CPU also appears to be unsoldered, given the ultra-smooth appearance of the die.
 
What's the big deal? I don't understand why this is a huge thing or not.

The difference in temp delta between solder and paste can be anywhere from 10c to 20c worse to best case. In the context of an overclocking chip, it can have direct impact on what is achievable. Guess how this will impact overclockers and their warranty?
 
Actually I recently saw a video on youtube with Der8auer suggesting Intel not solder the heat spreader on and instead use a good liquid metal thermal compound instead stating that the Solder would vastly shorten the lifespan of the chip in due to expansion/contraction and eventually breaking free not allowing heat to transfer properly.

The video in question is a few months old though
 
Takes some balls to delid a $2,000 CPU...

I'd still take a Threadripper over any of Intel's latest stuff.
 
Wow wtf they dont even use solder on the high core count chips anymore?

The thermal cycling cracking got worse as the die size increased. That would make sense as the total expansion is a function of the original size. More size = more expansion.

That said, I'm wondering why they aren't looking a re-flow thermal compounds. These are materials the reflow themselves at operating temperatures. Some of then have excellent thermal characteristics. The only catch is you have to have the perfect amount under the lid every time, or you risk there being a "gap" as it flows off the side.
 
Didn't someone just get the 18C version to 4.8Ghz? And 4.4Ghz at a more 24/7 level of voltage? I wouldn't call that "RIP overclocking"...Especially considering how much overclocking you can pull on Ryzen and TR's soldered chips.
Using liquid nitrogen?
 
Actually I recently saw a video on youtube with Der8auer suggesting Intel not solder the heat spreader on and instead use a good liquid metal thermal compound instead stating that the Solder would vastly shorten the lifespan of the chip in due to expansion/contraction and eventually breaking free not allowing heat to transfer properly.

Bad idea. I'm under the impression liquid metal TIM like the Cool Labs stuff dries out within about 12 months, which would even more vastly shorten the life of the chip if not reapplied regularly.
 
Bad idea. I'm under the impression liquid metal TIM like the Cool Labs stuff dries out within about 12 months, which would even more vastly shorten the life of the chip if not reapplied regularly.

Not really... been using my relidded 6700K and all my waterblocks which have all been on CLU for well over a year now w/o a change in temps. Now why would it shorten the life of the chip if not reapplied regularly? Where did that come from??
 
Not really... been using my relidded 6700K and all my waterblocks which have all been on CLU for well over a year now w/o a change in temps. Now why would it shorten the life of the chip if not reapplied regularly? Where did that come from??

Under open atmosphere, these compounds have the ability to "out gas" changing their characteristics. Even regular axle grease will do this. So this could happen to heatsinks. However under a sealed lid, this is not possible. And not all compounds suffer from this out-gassing characteristic
 
Not the consumer versions, I'm sure the xeons are soldered. Rip overclocking.
No, all Intel chips are using TIM now. That includes the Xeon Gold and Xeon Phi professional line of processors.
 
Under open atmosphere, these compounds have the ability to "out gas" changing their characteristics. Even regular axle grease will do this. So this could happen to heatsinks. However under a sealed lid, this is not possible. And not all compounds suffer from this out-gassing characteristic

Coulda, shoulda, maybe, ok sure. But how does that equal shortening the life of the chip?
 
Bad idea. I'm under the impression liquid metal TIM like the Cool Labs stuff dries out within about 12 months, which would even more vastly shorten the life of the chip if not reapplied regularly.
That may be the case for those who don't reseal the lid upon applying the liquid metal TIM, however once it's sealed it's fine from everything I'm seeing.

Now could the formula be adjusted to be less abrasive to certain materials? Yes.
Is it more expensive than what is currently used? Yes.
Do many people think the temp drops of 18-24c justify the risk? Yes

In all seriousness, with the cost of the chips they're manufacturing one would assume any chip manufacturer would do everything possible to ensure customer satisfaction. Yes I know I know they'd make slightly less per chip switching TIM to a higher quality one as well as the cost of re-tooling the lines to accept the new TIM
 
That may be the case for those who don't reseal the lid upon applying the liquid metal TIM, however once it's sealed it's fine from everything I'm seeing.

Now could the formula be adjusted to be less abrasive to certain materials? Yes.
Is it more expensive than what is currently used? Yes.
Do many people think the temp drops of 18-24c justify the risk? Yes

In all seriousness, with the cost of the chips they're manufacturing one would assume any chip manufacturer would do everything possible to ensure customer satisfaction. Yes I know I know they'd make slightly less per chip switching TIM to a higher quality one as well as the cost of re-tooling the lines to accept the new TIM

Does the current TIM allow acceptable temps? Yes.

Does the current TIM allow overclocking with acceptable temps? Yes.

Could a new TIM allow better OC and/or better temps? Yes.

Are current chips selling like hot cakes? Yes.

So what's Intel's incentive to take a hit to their profit margin across the whole line just to please the top 5-15% of overclockers, many of whom would STILL de-lid and put new TIM on?
 
Absolute package temps are one thing, deltas between cores is another. When I'm getting 10+C deltas between cores under full load (7700K, lowest core temp 63C, 2 in the 65-67C range, highest was 75C) then they are doing it wrong. I can only imagine when the same thing happens with a die as big as this.

So I spent <10 bux with my local 3D printer and delidded. Kinda wish I had taken a picture, as I had about 20% of the die with no TIM contact (edges on 2 sides and most of a corner, essentially looked like the IHS had been angled when mounted). Now I can try to match the 5.2GHz my 2700K would do... 5 years ago.

As far as the whole heat cycle issue. AMD is able to solder 4 separate die under the same heat spreader. Why can't Intel do the same on a homogeneous die? The aggregate area of the 4 die on Threadripper (outside dimensions of the array, it's the IHS and die expanding at different rates that is the issue) is larger then the single Intel die. So it not only has more area to deal with, but uneven heating with separate contact points. Sure, there 4 separate solder pads to reduce the total area and provide a buffer, but it's still all under the same IHS. Are we really going accept Intel couldn't figure something out for the Xeon at least?

I don't see how it's possible to defend Intel's decision. It's a straight up cost save (along with thinner PCBs?) on something that is already getting hundreds of percent of markup. I can only assume it's to somehow offset decreased margins caused by Intel's reaction to AMD and adding more cores across the line. You have to appease the shareholders, any way you can.

Would you be cool if only 2 cylinders of your V8 ever overheated?
 
Absolute package temps are one thing, deltas between cores is another. When I'm getting 10+C deltas between cores under full load (7700K, lowest core temp 63C, 2 in the 65-67C range, highest was 75C) then they are doing it wrong. I can only imagine when the same thing happens with a die as big as this.

So I spent <10 bux with my local 3D printer and delidded. Kinda wish I had taken a picture, as I had about 20% of the die with no TIM contact (edges on 2 sides and most of a corner, essentially looked like the IHS had been angled when mounted). Now I can try to match the 5.2GHz my 2700K would do... 5 years ago.

As far as the whole heat cycle issue. AMD is able to solder 4 separate die under the same heat spreader. Why can't Intel do the same on a homogeneous die? The aggregate area of the 4 die on Threadripper (outside dimensions of the array, it's the IHS and die expanding at different rates that is the issue) is larger then the single Intel die. So it not only has more area to deal with, but uneven heating with separate contact points. Sure, there 4 separate solder pads to reduce the total area and provide a buffer, but it's still all under the same IHS. Are we really going accept Intel couldn't figure something out for the Xeon at least?

I don't see how it's possible to defend Intel's decision. It's a straight up cost save (along with thinner PCBs?) on something that is already getting hundreds of percent of markup. I can only assume it's to somehow offset decreased margins caused by Intel's reaction to AMD and adding more cores across the line. You have to appease the shareholders, any way you can.

Would you be cool if only 2 cylinders of your V8 ever overheated?

We're SPECULATING that it's a cost saving measure. It could simply be they can't solder it due to the thermal stress with that large of a die. Especially when you have a situation where only 1 or 2 cores are active. AMD avoided that problem by having 4 separate dies (or 2 dies and 2 blanks or whatever). The smaller the die, the less thermal stress you have to handle.
 
We're SPECULATING that it's a cost saving measure. It could simply be they can't solder it due to the thermal stress with that large of a die. Especially when you have a situation where only 1 or 2 cores are active. AMD avoided that problem by having 4 separate dies (or 2 dies and 2 blanks or whatever). The smaller the die, the less thermal stress you have to handle.

You'e joking, right? Surely you don't take the word of Intel engineers over a bunch of random internet posters!
 
We're SPECULATING that it's a cost saving measure. It could simply be they can't solder it due to the thermal stress with that large of a die. Especially when you have a situation where only 1 or 2 cores are active. AMD avoided that problem by having 4 separate dies (or 2 dies and 2 blanks or whatever). The smaller the die, the less thermal stress you have to handle.
AFAIK it's he other way around - smaller dies made soldering a problem.
 
AFAIK it's he other way around - smaller dies made soldering a problem.

Just like elastic coefficient, heat expansion coefficient is a measure of Ce = mm/mm/C. That means how many mm does it expand for every millimeter of material per degree Celsius. Not quite as simple as this as expansion is often 3 dimensional. But for all intents and purposes, the equation is true for a fixed vector of direction.

Total expansion = Ce = size of die * number of degrees Celsius
 
Just like elastic coefficient, heat expansion coefficient is a measure of Ce = mm/mm/C. That means how many mm does it expand for every millimeter of material per degree Celsius. Not quite as simple as this as expansion is often 3 dimensional. But for all intents and purposes, the equation is true for a fixed vector of direction.

Total expansion = Ce = size of die * number of degrees Celsius
https://overclocking.guide/the-truth-about-cpu-soldering/
 

Reads like an apology to Intel. The disadvantages of solder is only an issue in a rapid cycling environment, like oh say LN2. LN2 doesn't even account for more than .002% of the user base (statistic pulled out of my ass)?

Micro cracks occur after about 200 to 300 thermal cycles. A thermal cycle is performed by going from -55 °C to 125 °C while each temperature is hold for 15 minutes. The micro cracks will grow over time and can damage the CPU permanently if the thermal resistance increases too much or the solder preform cracks completely.

Yea, not exactly a problem for 99% of us.
 
Absolute package temps are one thing, deltas between cores is another. When I'm getting 10+C deltas between cores under full load (7700K, lowest core temp 63C, 2 in the 65-67C range, highest was 75C) then they are doing it wrong. I can only imagine when the same thing happens with a die as big as this.

This happens even with soldered processors. My 5820ks have a > 10c delta between cores. IIRC my 2500k and q6600 did as well.
 
Not the consumer versions, I'm sure the xeons are soldered. Rip overclocking.

No Intel chips are soldered and with good reason. Doesn't matter if its 40$ or 13000$. Dont expect AMD to solder for much longer, they already dabble in TIM. Not using solder is a new requirement for the datacenter segment as well. Too many chips semi die (Read heat goes nuts) due to solder.

And did you even check the OC while lidded? Rip OC? It OCs a lot better than any TR chip.
 
No Intel chips are soldered and with good reason. Doesn't matter if its 40$ or 13000$. Dont expect AMD to solder for much longer, they already dabble in TIM. Not using solder is a new requirement for the datacenter segment as well. Too many chips semi die (Read heat goes nuts) due to solder.

And did you even check the OC while lidded? Rip OC? It OCs a lot better than any TR chip.
YOu really need to add links to your baseless claims so then they aren't baseless. All I see is a lot of crap in defense of Intel. Like what is the good reason EXACTLY? What does pricing matter in that decision in as far as CPU cost EXACTLY?
 
YOu really need to add links to your baseless claims so then they aren't baseless. All I see is a lot of crap in defense of Intel. Like what is the good reason EXACTLY? What does pricing matter in that decision in as far as CPU cost EXACTLY?

With you, all posts would have to have links in them, and then you often wouldn´t accept them anyway because they show something you dont like.

What part is upsetting you now? That SKL-SP Xeons aint soldered?

DHEdwpcUMAABxkE.jpg


Or Xeon Phis?

p7193706.jpg


Or the talk about solder that's been turned around so many times, yet every time someone gets the chance to rant about not using solder they do so without doing any kind of research first?
 
With you, all posts would have to have links in them, and then you often wouldn´t accept them anyway because they show something you dont like.

What part is upsetting you now? That SKL-SP Xeons aint soldered?

DHEdwpcUMAABxkE.jpg


Or Xeon Phis?

p7193706.jpg


Or the talk about solder that's been turned around so many times, yet every time someone gets the chance to rant about not using solder they do so without doing any kind of research first?
So what you are saying is you are talking out of your behind. Got it.

Let me help you then, sad I have to tell you the relevant facts.

Intel spent millions looking into a higher quality TIM because of some of the issues with solder, but more so to save money. The whole issue with solder/TIM in Intel CPUs was more to do with the distance between IHS and the CPU, where solder has a definitive advantage. Now when you add the recent 10core Reviews and the heat/power concern then when looking at the 18core there will be widespread concern. Delidding isn't a viable option for most hence the desire for solder over TIM and the vast posts of concern over Intels choice. And yes I have seen the post earlier about the 18core clocks which I don't believe for a second as "common place".

See how easy that was to give ACTUAL information based in facts and easy enough for others to comprehend the point with a clear understanding. With how you post and the vague and alluding nature of your posts, linking any other material would go a long way into letting others get a clearer understanding of your point. Would be far less arguing.
 
So what you are saying is you are talking out of your behind. Got it.

Let me help you then, sad I have to tell you the relevant facts.

Intel spent millions looking into a higher quality TIM because of some of the issues with solder, but more so to save money. The whole issue with solder/TIM in Intel CPUs was more to do with the distance between IHS and the CPU, where solder has a definitive advantage. Now when you add the recent 10core Reviews and the heat/power concern then when looking at the 18core there will be widespread concern. Delidding isn't a viable option for most hence the desire for solder over TIM and the vast posts of concern over Intels choice. And yes I have seen the post earlier about the 18core clocks which I don't believe for a second as "common place".

See how easy that was to give ACTUAL information based in facts and easy enough for others to comprehend the point with a clear understanding. With how you post and the vague and alluding nature of your posts, linking any other material would go a long way into letting others get a clearer understanding of your point. Would be far less arguing.

Please prove all your baseless claims with links so they ain't baseless, thanks. All I see is the usual Intel hate crap from you ;)

Or will it be another case of double standards as usual? :D
 
No Intel chips are soldered and with good reason. Doesn't matter if its 40$ or 13000$. Dont expect AMD to solder for much longer, they already dabble in TIM. Not using solder is a new requirement for the datacenter segment as well. Too many chips semi die (Read heat goes nuts) due to solder.

And did you even check the OC while lidded? Rip OC? It OCs a lot better than any TR chip.
Have you seen the reports of temp spikes on Intel's X parts?

Doh!
 
You mean those running AVX512 at full speed? There is a reason why there is an offset option.

It's still a design flaw to have sudden spikes like that. Even intel said they were looking into it further.

Intel is NOT infallible. Even on mega scale projects, the key architects can miss a critical component. And when it comes to key architects, you're usually down to a very small group of people with the skills to do such. The smaller the group, the more likely the errors.
 
It's still a design flaw to have sudden spikes like that. Even intel said they were looking into it further.

Intel is NOT infallible. Even on mega scale projects, the key architects can miss a critical component. And when it comes to key architects, you're usually down to a very small group of people with the skills to do such. The smaller the group, the more likely the errors.

Wasn't there a report of spikes on 7700K? Is it that you refer to? Where did that end?

By X parts do you mean SKL-X parts? I haven't seen sudden spikes there. Could you link it for me?
 
So what you are saying is you are talking out of your behind. Got it.

Let me help you then, sad I have to tell you the relevant facts.

Intel spent millions looking into a higher quality TIM because of some of the issues with solder, but more so to save money. The whole issue with solder/TIM in Intel CPUs was more to do with the distance between IHS and the CPU, where solder has a definitive advantage. Now when you add the recent 10core Reviews and the heat/power concern then when looking at the 18core there will be widespread concern. Delidding isn't a viable option for most hence the desire for solder over TIM and the vast posts of concern over Intels choice. And yes I have seen the post earlier about the 18core clocks which I don't believe for a second as "common place".

See how easy that was to give ACTUAL information based in facts and easy enough for others to comprehend the point with a clear understanding. With how you post and the vague and alluding nature of your posts, linking any other material would go a long way into letting others get a clearer understanding of your point. Would be far less arguing.

Speaking of baseless claims....How many millions did Intel spend on R&D into TIM? They have good thermal engineers at Intel, I'm guessing they'd just figure out their requirements and find a suitable TIM from one of their supplier's catalogues. That doesn't take millions, that takes one dude to do the math and another dude to check his work.

Now I agree that a lot of the complaints about "crappy Intel TIM" are really just due to the spacing between the die and inside of the IHS. No matter how good your TIM, if that gap is large, your temps will suffer. That's a manufacturing process issue, and might require significant retooling to the production line to make that fit tighter without risking damage to the dies.
 
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