Ieldra
I Promise to RTFM
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- Mar 28, 2016
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depends on how far past 2 GHz it goes. it needs to hit at least 2100 MHz to overclock as well as a 980 Ti (+25%).Overclocking headroom on the 1080 looks to be massive, if that report is to be believed. over 2ghz with a water block.
If it hits 2 ghz at all it seems would pretty be impressive.
We'll see.
Yep they were, pretty sure this card will be able to do more than 2ghz on water, if you can deliver enough power to it.
96What's the 980 TIs?
Yeah but coulda been 96 pixels per clock... at 2000 mhz.
Yeah but coulda been 96 pixels per clock... at 2000 mhz.
Hhhgghbbbb
I think this is how it will work. Pascal SM's still cannot do graphics + compute concurrently because of the expensive context switch.
The solution is to partition the GPC (so at the level of single SMs) to do graphics + compute.
The problem with maxwell is that the SM partitioning (afaik) could only be altered at each drawcall, whereas with Pascal's pixel, Triangle and instruction level preemption the repartitioning can be done with finer granularity.
I expect this to work on maxwell as well, but there will need to be careful profiling to avoid pipeline stalls
gs
Also anyone notice how the witcher 3 is featured on their async compute slide?
Pascal's SM's can now do both compute and graphics kernels, at the same time its in the slides, this was not doable with Maxwell, as a whole you can have different queues on different SM's, but trying to force one SM on Maxwell to do both, you end up with major under utilization of the ALU's if the scheduler predicts incorrectly, hence the performance penalties when doing heavy compute tasks, as the graphics queue would have to wait.
That would require increasing the rop:bus-width ratio which they already did with maxwell
This will be fine man, it's memory bandwidth that is the question mark
Can you link to the specific slide? I didn't see anything to this effect
Dynamic load slide mentions gpu partitioning, nothing explicitly references sm-level concurrency and/or reduced context switch penaltyWell check the dynamic load slides.
There is more.... just hasn't been leaked yet.
I think it's clear from the slides that there's no more static partitioning with Pascal. The slide also explains why Maxwell performance tanks with async.
Yeah I got that, but how does this relate to the context switch cost on the SMs. Am I having a brainfart?
The pre-emption slide mentions under 100 microseconds switching cost for games. Didnt really address SM level concurrency, which is not necessarily something you want - i.e. compute and graphics fighting for the same L1 cache.
Still don't quite get how pre-emption is a general solution for async. Pre-emption is useful if you want to interrupt a running task to make way for a higher priority kernel (like VR time warp). But async is more about running multiple kernels concurrently to take full advantage of all available execution resources.
Speaking of critical path, notice how nvidia wrote path optimization on the slide with clocks. Ties in nicely to all our rants about clocking being an architectural limitation mainlypreemption and context switching should only be used for prioritizing or syncing, think of critical path.
2.5 GHz mentioned here.Overclocking headroom on the 1080 looks to be massive, if that report is to be believed. over 2ghz with a water block.
bench plz
Show me the benches before I'll believe it's 70% faster than a 980 on average.According to Nvidia's slides the 1080 should be 70% faster than a 980, hot damn.
Show me 2.5 GHz OC and we have a winner.
According to Nvidia's slides the 1080 should be 70% faster than a 980, hot damn.
Show me 2.5 GHz OC and we have a winner.
Now just imagine what big pascal will do. That's the monster I'm impatiently waiting on.
Titan with 3840 SPs @ 2ghz will be 15tflops
Halfway there to make that FS/FT post quota! Keep those two-word non sequiturs coming, you're almost there!
Edit: Holy smokes, just noticed you joined yesterday. You must really want to buy/sell something.