My concern is this: While IPC is probably going to be 20-30% higher for the typical use case, there has been very little mention of the other half of performance: Clock speed. I have a feeling we might see a clock speed reduction compared to BD.
Point being, if the IPC improvements get you to Haswell level performance, but you then reduce the clock, you fall back to SB/IB level, which is basically non-competitive.
You think a drop in die size is going to decrease the clock speed?
Clock speed has less to do with performance because of the base design of Zen, going wider and doing more per clock is much more important that clock speed. If they are able to keep their chips around the 3.5 to 4 ghz range and improve their IPC they are good to go.