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what is VID?
- Thread starter LOUISSSSS
- Start date
VID is a lot more complicated than everyone thinks, and has absolutely nothing to do with how a cpu will oc as far as anyone has been able to conclusively show. You can get different VID readings on a cpu in different motherboards, depending on what voltage regulation chip it uses. This alone is enough to make VID useless for predicting oc'ability.
The below is a cut/paste from a thread on another forum where we were discussing VID, hope it helps...
The VID is hardcoded into each individual cpu, but it's not just one number; it's a range of 6 different VID levels and these levels are specific to each individual cpu. VID is not static and changes with power requirements. VID can fluctuate almost constantly to try to maintain the level programed into it during manufacturing.
I was just curious what CT actually reports, is it reporting the VID being used at the time, max VID, etc.. VID is read from a sense line off one of the cpu pads, it seems like CT would have to be reading whatever VID level is in use at that time. :coocoo:
Here is an explaination of VID on C2D processors, this is the short version, the whole thing explaining all the levels, how it's read, etc.. is available in the data sheets for the cpu's on Intel's site..
I can't find anyone who really knows for sure.... but if CT is reading VID from the VCC_Sense and VSS_Sense lines, then it almost has to be reading the VID level in use at that particular time????
The below is a cut/paste from a thread on another forum where we were discussing VID, hope it helps...
@boshuter - My understanding was the the VID doesn't change and that the one reported in coretemp is hardcoded into the chip from Intel. I could be wrong.
@Briany - You have a B3 with a 1.2625v VID... is your machine water cooled and what is the vcore in your BIOS to run 9x400? Also, is it stable to prime95 v25 or 2x orthos?
The VID is hardcoded into each individual cpu, but it's not just one number; it's a range of 6 different VID levels and these levels are specific to each individual cpu. VID is not static and changes with power requirements. VID can fluctuate almost constantly to try to maintain the level programed into it during manufacturing.
I was just curious what CT actually reports, is it reporting the VID being used at the time, max VID, etc.. VID is read from a sense line off one of the cpu pads, it seems like CT would have to be reading whatever VID level is in use at that time. :coocoo:
Here is an explaination of VID on C2D processors, this is the short version, the whole thing explaining all the levels, how it's read, etc.. is available in the data sheets for the cpu's on Intel's site..
Individual processor VID values may be calibrated during manufacturing such that two devices at the same core speed may have different default VID settings. This is reflected by the VID Range values provided in Table 5.
The processor uses six voltage identification signals, VID[6:1], to support automatic selection of power supply voltages.
The processor provides the ability to operate while transitioning to an adjacent VID and its associated processor core voltage (VCC). This will represent a DC shift in the load line. It should be noted that a low-to-high or high-to-low voltage state change may result in as many VID transitions as necessary to reach the target core voltage.
Transitions above the specified VID are not permitted. Table 5 includes VID step sizes and DC shift ranges. Minimum and maximum voltages must be maintained as shown in Table 6 and Figure 1 as measured across the VCC_SENSE and VSS_SENSE lands.
I can't find anyone who really knows for sure.... but if CT is reading VID from the VCC_Sense and VSS_Sense lines, then it almost has to be reading the VID level in use at that particular time????