The Miracle of Matisse

Nightfire

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I know everyone is salivating over some real world reviews of gen 3 Ryzen, but it is worth appreciating some of the overlooked technical achievements of the new CPU.

TPU has a nice article that articulates the effort that needed to go into making a multi die layout work with the older monolithic designed packages:

https://www.techpowerup.com/256511/amd-ryzen-3000-matisse-i-o-controller-die-12nm-not-14nm

Hype and marketing. I also miss Techpowerup fails to mention Globalfundries 12LP is just 14LPP and still keeps with the nonsensical 12nm hype

7c02bb7b9df96f40c1ffae935087eead5ff59a804c563082d37c4f040bd6d9c4.png


At least the last slide puts to an end the fantasy of an L4 in the IO die or the fantasy all the L3 was in the IO die. As some of us have been saying since past year: there is no room for cache in the IO die.
 
Hype and marketing. I also miss Techpowerup fails to mention Globalfundries 12LP is just 14LPP and still keeps with the nonsensical 12nm hype

View attachment 168200

At least the last slide puts to an end the fantasy of an L4 in the IO die or the fantasy all the L3 was in the IO die. As some of us have been saying since past year: there is no room for cache in the IO die.

That point is always interesting,
Hype and marketing. I also miss Techpowerup fails to mention Globalfundries 12LP is just 14LPP and still keeps with the nonsensical 12nm hype

At least the last slide puts to an end the fantasy of an L4 in the IO die or the fantasy all the L3 was in the IO die. As some of us have been saying since past year: there is no room for cache in the IO die.

The 12nm I/O die might be the highlight of the TPU article, but it is really not the point of the thread.
 
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