AMD Shows of Epyc Datacenter CPU

FrgMstr

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AMD Shows of Epyc Datacenter CPU
AMD just got finished off showing off some of the basics about its EPYC datacenter processor. It is based on the Zen architecture goodness, and is in a nutshull, four Ryzen CPUs on a single package for server. So you get 32 Cores under one integrated heat spreader with support for 4TB of memory and 128 native PCIe lanes.
 
smart move making it a soc like a xeon d on major steroids. That allows more margin on the cpu in a competitive total system price.
 
AMD EPYC
  • AMD Just announced the brand name for Data-center CPU based on Ryzen, the brand name will be called EPYC.
    EPYC obviously is what previously known as "Naples". A series server processors based on"(Ry)Zen" x86 processing engine with up to 32 cores. Naples has 32 cores and is capable of 64 simultaneous threads, eight memory channels, supporting up to 2TB RAM per CPU and 128 PCIe 3.0 lanes. Memory can run 2400/2677 MHz per channel. The memory controller is also capable of using bigger than 16GB DIMMs and in total you could fit 4 TB of DDR4 memory. The Naples processor (well SoC) connects to whatever you need it through over a 128 high-speed I/O-lanes mostly Gen 3. This means you could connect 4 GPU's, 12 NVMe-SSD's and some fast 10 GigE Ethernet ports to go along with it. When you couple two processors in SMT, the IO is shared though and 64 lanes will be used for the interconnect in-between the two Naples processors. Each Naples processor has four Zen based 8-core dies interconnected.

from http://www.guru3d.com/news-story/10pm-cest-amd-financial-analyst-presentation-live-feed.html
 
Probably 2.4ghz... 64 threads on one die good lord thats one helluva video transcoder thingy mabobber. Probably 2k in dollars for that chip
 
VIRTUALIZATION. Who's going to run this thing bare metal, save for maybe some SQL DB or SAN which can use all the threads and IO.
 
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Someone doing video encoding. My two 12c/24t rendering machines could finally retire...
 
A better shot

picture.php
 
Dies are probably flawed, used for demonsrtation purposes. Looks like a chip on the bottom right die. A monster to say the least. Exciting times in semis.
 
Probably 2.4ghz... 64 threads on one die good lord thats one helluva video transcoder thingy mabobber. Probably 2k in dollars for that chip
I would think the same core speed limitations of around 4ghz except power requirements may limit the final usable clock. Plus heat output - who wants to dissipate 400w from a cpu? :nailbiting:
 
I would think the same core speed limitations of around 4ghz except power requirements may limit the final usable clock. Plus heat output - who wants to dissipate 400w from a cpu? :nailbiting:

Are you [H]?? 400 watts off the cpu? That is like puppy kisses. I want snake venom bad ass kilowatt power usage as long as my cores are in DESTROYER mode and smoking any app I toss at it.

We are not a power greenie weenie forum of vegan peta people. We are Neegan and we carry barb wire covered baseball bats made out of 32 core hickory head bashing badassness.

If 400 watts is a concern I hear Kyle is giving free [H] card revokations upon request.
 
If 400 watts is a concern I hear Kyle is giving free [H] card revokations upon request.

It's a concern if you want to run a full rack of these things. 42X 1U servers with dual 400W CPU's? That's an assload of cores, so you're very dense. But if you've got to upgrade your PDU's to 40+ amp circuits, that's going to be something else.

Don't get mad at me though for just pointing out that wattage still matters. I'm a big fan and I can't wait to see them in action from Dell, HP, Cisco, Lenovo, etc.
 
It's a concern if you want to run a full rack of these things. 42X 1U servers with dual 400W CPU's? That's an assload of cores, so you're very dense. But if you've got to upgrade your PDU's to 40+ amp circuits, that's going to be something else.

Don't get mad at me though for just pointing out that wattage still matters. I'm a big fan and I can't wait to see them in action from Dell, HP, Cisco, Lenovo, etc.
Haha true in that regard.

If your running a single chip it wont make a difference but a rack full sure thing.

It's highly doubtful they are anywhere close to 400. More likely 150 just down clocked a little or 200w max. But at what cost to clockspeed.

Your post made it sound like a workstation concern. Not a datacenter scenario. And trust me people will buy these damn things to run at home for whatever reason. You bet your ass. There is always a few out there. 400 watt means nothing to them and a big ass custom loop. I'd be tempted except 64 threads... I have no workload demanding I spend that kind of money. Shit a mobo will probably push 500 dollars on avg.

So I am eyeballing threadripper. Unless Tripper is $1000 And Epyc is $1300 LMAO dreaming. I'd go with the epyc. I'm betting 2k to 2.4k in price for this chip.
 
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VIRTUALIZATION. Who's going to run this thing bare metal, save for maybe some SQL DB or SAN which can use all the threads and IO.

epeen.... No wait... e =====)peen

I bet someone will buy this and claim it sucks at gaming.... BET they will just watch.
 
I'd be interested to see if they could do an e.g. non ECC enthusiast version or something at a lower price, with ECC enabled on Threadripper/Ryzen as usual. That would make Intel shit even more bricks.. Video editing freaks like me would flip out.

I'd expect about 3-3.2Ghz on these on average. What we have to realize is Zen is quite efficient in the 2.8-3.5GHz range before 2nd critical.
Case in point;

6 cores
Ryzen 5 1600 3.2GHz 65W
Ryzen 5 1600X 3.6GHz 95W
Difference is 30W for 400MHz

8 cores
Same with 1700s
1700 is 3.0GHz 65W TDP
1700X is 3.4GHz 95W TDP.
Difference of 30W again for 400MHz with 200MHz lower than 6 core clocks

4x 1700 = 260W per socket with 3GHz base. If they get any further process improvements expect more.

That's not very bad at all and I would not be surprised to see them clock it a little higher. I expect Threadripper around 3.6-3.8GHz in top model.
 

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Are you [H]?? 400 watts off the cpu? That is like puppy kisses. I want snake venom bad ass kilowatt power usage as long as my cores are in DESTROYER mode and smoking any app I toss at it.

We are not a power greenie weenie forum of vegan peta people. We are Neegan and we carry barb wire covered baseball bats made out of 32 core hickory head bashing badassness.

If 400 watts is a concern I hear Kyle is giving free [H] card revokations upon request.
lol, got me there. Now will you be able to do that? I will be that is if there is a decent block for it. Still not sure if I want to put all the bucks in a X399 platform.
 
lol, got me there. Now will you be able to do that? I will be that is if there is a decent block for it. Still not sure if I want to put all the bucks in a X399 platform.

More of a joke. No one wants a KW Tdp lol

But I am excited for T Ripper. Epyc is a different socket though.
 
Lisa Su tweeted of an event in Austin with partners at 3pm CST for EPYC.
 
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http://techreport.com/review/32125/amd-epyc-7000-series-cpus-revealed/2

AMD is making some claims about the performance of various Epyc products' performance today, and the initial outlook is good. However, we do have to take issue with a couple of the choices AMD made on the way to its numbers. After compiling SPECint_rate_base2006 with the -O2 flag in GCC, AMD says observed a 43% delta between its internal numbers for the Xeon E5-2699A v4 and public SPEC numbers for similar systems produced using binaries generated by the Intel C++ compiler. In turn, AMD applied that 43% (or 0.575x) across the board to some publicly-available SPECint_rate_base scores for several two-socket Xeon systems.

It's certainly fair to say that SPEC results produced with Intel's compiler might deserve adjustment, but my conversations with other analysts present at the Epyc event suggests that a 43% reduction is optimistic. The -O2 flag for GCC isn't the most aggressive set of optimizations available from that compiler, and SPEC binaries generated accordingly may not be fully representative of binaries compiled in the real world.

Already cheating with benches.
 
http://pclab.pl/art74598.html

7601 32C 2.2Ghz base, 2.7Ghz all core turbo, 3.2Ghz max turbo, 180W (200W high TDP mode).
7501 32C 2.0Ghz base, 2.6Ghz all core turbo, 3.0Ghz max turbo, 170W TDP.
7401 24C 2.0Ghz base, 2.8Ghz all core turbo, 3.0Ghz max turbo, 170W TDP.
 

Anyone doing serious business uses GCC, not ICC. Tell big data centers to use proprietary software like ICC... which generated binaries to slowdown AMD processors. You can not trust that software. Imagine Intel generates binaries which slowdown systems with NVIDIA GPUs instead of Intel's Xeon Phi.

Plus, -O3 or more agressive optimization is dangerous for mathematical workloads. Usually no more than -O2 is applied.

Finally, as of today, GCC still does not implement an optimized scheduler for Ryzen. If you want a better optimized binary for Ryzen (but not the best until they release the schedule code) you have to enable the -march=haswell flag. So no, they have not cheated with their benchmarks. They have put their processor and their competitor's under a fair light of equal disadvantage.
 
The best compiler there is

I corrected your quote. Faster is not best. Best is not fastest. Best depends on your target. ICC does not fit in many targets, including data centers or supercomputers.

AMD does not use ICC for their drivers. Neither does NVIDIA.

Tell big data centers to use proprietary software like ICC... which generated binaries to slowdown AMD processors. You can not trust that software. Imagine Intel generates binaries which slowdown systems with NVIDIA GPUs instead of Intel's Xeon Phi.

Plus, -O3 or more agressive optimization is dangerous for mathematical workloads. Usually no more than -O2 is applied.

Finally, as of today, GCC still does not implement an optimized scheduler for Ryzen. If you want a better optimized binary for Ryzen (but not the best until they release the schedule code) you have to enable the -march=haswell flag. So no, they have not cheated with their benchmarks. They have put their processor and their competitor's under a fair light of equal disadvantage.
 
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